MT48LC64M4A2 Micron Technology, MT48LC64M4A2 Datasheet - Page 58

• Manufacturer Part Number: MT48LC64M4A2
• Description: (MT48Lxxxx) SYNCHRONOUS DRAM
• Manufacturer: Micron Technology

TIMING PARAMETERS
*CAS latency indicated in parentheses.
NOTE: 1. For this example, the burst length = 4.
256Mb: x4, x8, x16 SDRAM
256MSDRAM_E.p65 – Rev. E; Pub. 3/02
A0-A9, A11, A12
DQML, DQMU
SYMBOL*
t
t
t
t
t
t
t
AH
AS
CH
CL
CK (3)
CK (2)
CKH
COMMAND
BA0, BA1
2. x16: A9, A11, and A12 = “Don’t Care”
DQM/
CLK
CKE
A10
DQ
x8: A11 and A12 = “Don’t Care”
x4: A12 = “Don’t Care”
MIN
0.8
1.5
2.5
2.5
7.5
0.8
t CMS
7
t CKS
t AS
t AS
t AS
ACTIVE
-7E
T0
ROW
ROW
BANK
t CKH
t CMH
t AH
t AH
t AH
MAX
t RCD
t CK
T1
NOP
MIN
0.8
1.5
2.5
2.5
7.5
0.8
10
-75
DISABLE AUTO PRECHARGE
ENABLE AUTO PRECHARGE
t CMS
t CL
WRITE – DQM OPERATION
MAX
COLUMN m 2
t DS
WRITE
T2
BANK
D
IN
t CMH
t DH
m
t CH
UNITS
ns
ns
ns
ns
ns
ns
ns
T3
NOP
58
SYMBOL*
t
t
t
t
t
t
CKS
CMH
CMS
DH
DS
RCD
t DS
D
T4
IN
NOP
m + 2
t DH
Micron Technology, Inc., reserves the right to change products or specifications without notice.
MIN
1.5
0.8
1.5
0.8
1.5
15
1
t DS
-7E
D
T5
IN
NOP
m + 3
MAX
t DH
256Mb: x4, x8, x16
MIN
NOP
1.5
0.8
1.5
0.8
1.5
20
T6
-75
©2002, Micron Technology, Inc.
MAX
SDRAM
NOP
DON’T CARE
T7
UNITS
ns
ns
ns
ns
ns
ns