XC3030L Xilinx, XC3030L Datasheet - Page 37

• Manufacturer Part Number: XC3030L
• Description: Logic Cell Array Families
• Manufacturer: Xilinx

XC3000 Families Pin Assignments
Xilinx offers the six different array sizes in the XC3000
families in a variety of surface-mount and through-hole
package types, with pin counts from 44 to 223.
Each chip is offered in several package types to accommo-
date the available PC board space and manufacturing
technology. Most package types are also offered with
different chips to accommodate design changes without
the need for PC board changes.
Number of Available I/O Pins
XC3020/XC3120
XC3030/XC3130
XC3042/XC3142
XC3064/XC3164
XC3090/XC3190
XC3195
Device
3020
3030
3042
3064
3090
3195
n.c. = Unconnected package pin
u = Unbonded device pad
Pads
74
98
118
142
166
198
Max I/O
120
144
176
64
80
96
54 u
44
—
—
—
—
—
44
34
34 u
64
—
—
—
—
—
54
64
Number of Unbounded or Unconnected Pins
30 u
68
58
58
6 u
68
—
—
—
—
64
74
74
70
70
70
84 100 120 132 144 156 160 164 175
10 n.c.
114 u
14 u
34 u
50 u
82 u
84
Number of Package Pins
64
80
82
26 n.c.
2 n.c.
18 u
100
—
—
—
Number of Package Pins
2-139
110
96
14 n.c.
10 u
132
—
—
—
—
Note that there is no perfect match between the number of
bonding pads on the chip and the number of pins on a
package. In some cases, the chip has more pads than
there are pins on the package, as indicated by the informa-
tion (“unused” pads) below the line in the following table.
The IOBs of the unconnected pads can still be used as
storage elements if the specified propagation delays and
set-up times are acceptable.
In other cases, the chip has fewer pads than there are
pins on the package; therefore, some package pins are
not connected (n.c.), as shown above the line in the
following table.
26 n.c.
144
2 u
—
—
—
—
120
138
138
18 n.c.
160
6 u
—
—
—
—
142 144
144
9 n.c
9 n.c.
175
32 u
—
—
—
—
144
176
10 n.c.
176
—
—
—
—
—
191 196 208 223 240
42 n.c.
10 n.c.
208
—
—
—
—
144
176 176
25 n.c.
223
X6095
—
—
—
—
—
X3478