XC3030L Xilinx, XC3030L Datasheet - Page 8

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XC3030L

Manufacturer Part Number
XC3030L
Description
Logic Cell Array Families
Manufacturer
Xilinx
Datasheet

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XC3000, XC3000A, XC3000L, XC3100, XC3100A Logic Cell Array Families
Figure 5
5a. Combinatorial Logic Option FG generates two functions
5b. Combinatorial Logic Option F generates any function of
5c. Combinatorial Logic Option FGM allows variable E to
A
B
C
D
E
A
B
C
D
E
A
B
C
D
E
A
B
C
D
A
B
C
D
E
of four variables each. One variable, A, must be common
to both functions. The second and third variable can be
any choice of of B, C, QX and QY The fourth variable
can be any choice of D or E.
five variables: A, D, E and and two choices out of B, C,
QX, QY.
select between two functions of four variables: Both have
common inputs A and D and any choice out of B, C, QX
and QY for the remaining two variables. Option 3 can
then implement some functions of six or seven variables.
QX
QX
QX
QX
QX
QY
QY
QY
QY
QY
of 5 Variables
Any Function
Any Function
Any Function
Any Function
Any Function
of Up to 4
Variables
of Up to 4
Variables
of Up to 4
Variables
of Up to 4
Variables
M
U
X
F
G
F
G
5a
5b
F
G
5c
FGM
Mode
X5442
2-110
Figure 6. C8BCP Macro.
The C8BCP macro (modulo-8 binary counter with parallel
enable and clock enable) uses one combinatorial logic block
of each option.
Parallel Enable
Count Enable
Clock
D0
D1
D2
Dual Function of 4 Variables
Function of 5 Variables
Function of 6 Variables
D
D
D
Q
Q
Q
FG
Mode
F
Mode
FGM
Mode
Q0
Q1
Q2
Terminal
Count
X5383

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