M30624FGAFP#U3 Renesas Electronics America, M30624FGAFP#U3 Datasheet - Page 131

• Manufacturer Part Number: M30624FGAFP#U3
• Description: IC M16C MCU FLASH 100QFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/60r

Specifications of M30624FGAFP#U3

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: SIO, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 20K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-QFP
• For Use With: 867-1000 - KIT QUICK START RENESAS 62PM3062PT3-CPE-3 - EMULATOR COMPACT M16C/62P/30P
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Clock asynchronous serial I/O (UART) mode
128
Figure 1.16.17. Typical transmit timings in UART mode(UART0,UART1)
• Example of transmit timing when transfer data is 8 bits long (parity enabled, one stop bit)
Transfer clock
Transmit enable
bit(TE)
Transmit buffer
empty flag(TI)
TxDi
Transmit register
empty flag (TXEPT)
Transmit interrupt
request bit (IR)
• Example of transmit timing when transfer data is 9 bits long (parity disabled, two stop bits)
CTSi
Transfer clock
Transmit buffer
empty flag(TI)
Transmit interrupt
request bit (IR)
Transmit enable
bit(TE)
TxDi
Transmit register
empty flag (TXEPT)
Shown in ( ) are bit symbols.
The above timing applies to the following settings :
Shown in ( ) are bit symbols.
• Parity is enabled.
• One stop bit.
• CTS function is selected.
• Transmit interrupt cause select bit = “1”.
The above timing applies to the following settings :
• Parity is disabled.
• Two stop bits.
• CTS function is disabled.
• Transmit interrupt cause select bit = “0”.
“H”
“1”
“0”
“1”
“0”
“L”
“1”
“0”
“1”
“0”
“1”
“0”
“1”
“0”
“1”
“0”
“1”
“0”
Start
Start
ST
ST
bit
Data is set in UARTi transmit buffer register
bit
Cleared to “0” when interrupt request is accepted, or cleared by software
D
D
Data is set in UARTi transmit buffer register.
0
0
D
D
1
1
Tc
D
D
2
2
D
D
3
3
Tc
D
D
4
4
The transfer clock stops momentarily as CTS is “H” when the stop bit is checked.
The transfer clock starts as the transfer starts immediately CTS changes to “L”.
Transferred from UARTi transmit buffer register to UARTi transmit register
D
D
5
5
D
D
6
6
Transferred from UARTi transmit buffer register to UARTi transmit register
D
D
Tc = 16 (n + 1) / fi or 16 (n + 1) / f
Parity
7
7
bit
D
P
fi : frequency of BRGi count source (f
f
n : value set to BRGi
8
EXT
Stop
Cleared to “0” when interrupt request is accepted, or cleared by software
Tc = 16 (n + 1) / fi or 16 (n + 1) / f
bit
SP
Stop
SP
bit
: frequency of BRGi count source (external clock)
SP
fi : frequency of BRGi count source (f
f
n : value set to BRGi
EXT
Stop
ST
bit
ST
: frequency of BRGi count source (external clock)
D
D
0
0
D
D
1
1
D
D
2
2
Stopped pulsing because transmit enable bit = “0”
D
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
D
3
3
EXT
D
D
4
4
D
D
5
EXT
5
1
D
, f
D
6
8
6
, f
D
D
7
32
7
1
, f
)
P SP
D
8
8
, f
32
SPSP
M16C / 62A Group
)
Mitsubishi microcomputers
ST
ST
D
0
D
D
0
1
D
1