M30624FGAFP#U3 Renesas Electronics America, M30624FGAFP#U3 Datasheet - Page 28

IC M16C MCU FLASH 100QFP

M30624FGAFP#U3

Manufacturer Part Number
M30624FGAFP#U3
Description
IC M16C MCU FLASH 100QFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/60r
Datasheets

Specifications of M30624FGAFP#U3

Core Processor
M16C/60
Core Size
16-Bit
Speed
16MHz
Connectivity
SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
85
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
20K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
For Use With
867-1000 - KIT QUICK START RENESAS 62PM3062PT3-CPE-3 - EMULATOR COMPACT M16C/62P/30P
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Bus Settings
Bus Settings
Table 1.8.1. Factors for switching bus settings
The BYTE pin and bits 4 to 6 of the processor mode register 0 (address 0004
Table 1.8.1 shows the factors used to change the bus settings.
(1) Selecting external address bus width
(2) Selecting external data bus width
(3) Selecting separate/multiplex bus
Switching external address bus width
Switching external data bus width
Switching between separate and multiplex bus
The address bus width for external output in the 1M bytes of address space can be set to 16 bits (64K
bytes address space) or 20 bits (1M bytes address space). When bit 6 of the processor mode register 0
is set to “1”, the external address bus width is set to 16 bits, and P2 and P3 become part of the address
bus. P4
to “0”, the external address bus width is set to 20 bits, and P2, P3, and P4
address bus.
The external data bus width can be set to 8 or 16 bits. (Note, however, that only the separate bus can be
set.) When the BYTE pin is “L”, the bus width is set to 16 bits; when “H”, it is set to 8 bits. (The internal bus
width is permanently set to 16 bits.) While operating, fix the BYTE pin either to “H” or to “L”.
The bus format can be set to multiplex or separate bus using bits 4 and 5 of the processor mode register 0.
• Separate bus
• Multiplex bus
In this mode, the data and address are input and output separately. The data bus can be set using the
BYTE pin to be 8 or 16 bits. When the BYTE pin is “H”, the data bus is set to 8 bits and P0 functions as
the data bus and P1 as a programmable I/O port. When the BYTE pin is “L”, the data bus is set to 16
bits and P0 and P1 are both used for the data bus.
When the separate bus is used for access, a software wait can be selected.
In this mode, data and address I/O are time multiplexed. With the BYTE pin = “H”, the 8 bits from D
D
With the BYTE pin = “L”, the 8 bits from D
multiplexed. In this case, the external devices connected to the multiplexed bus are mapped to the
microcomputer’s even addresses (every 2nd address). To access these external devices, access the
even addresses as bytes.
The ALE signal latches the address. It is output from P5
Before using the multiplex bus for access, be sure to insert a software wait.
If the entire space is of multiplexed bus in memory expansion mode, choose an 8-bit width.
The processor operates using the separate bus after reset is revoked, so the entire space multiplexed
bus cannot be chosen in microprocessor mode.
P3
in each chip select.
7
1
are multiplexed with A
to P3
0
to P4
7
become a port if the entire space multiplexed bus is chosen, so only 256 bytes can be used
3
can be used as programmable I/O ports. When bit 6 of processor mode register 0 is set
Bus setting
0
to A
7
.
0
to D
Bit 6 of processor mode register 0
BYTE pin
Bits 4 and 5 of processor mode register 0
7
are multiplexed with A
6
.
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
16
Switching factor
) are used to change the bus settings.
0
to P4
1
to A
3
8
M16C / 62A Group
become part of the
. D
Mitsubishi microcomputers
8
to D
15
are not
0
to
25

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