M30624FGAFP#U3 Renesas Electronics America, M30624FGAFP#U3 Datasheet - Page 275

• Manufacturer Part Number: M30624FGAFP#U3
• Description: IC M16C MCU FLASH 100QFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/60r

Specifications of M30624FGAFP#U3

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: SIO, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 20K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-QFP
• For Use With: 867-1000 - KIT QUICK START RENESAS 62PM3062PT3-CPE-3 - EMULATOR COMPACT M16C/62P/30P
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

272
REV. B1
Version
REV. B
Revision history
Page 220 Figure 1.26.1 is partly revised.
Page 221 Figure 1.26.2 is partly revised.
Page 222 Explanation of “(1) Operation speed” is partly revised.
Page 222 Explanation of “(3) Interrupts inhibited against use” is revised.
Page 222 Explanation of “(6) Access disable” is partly revised.
Page 222 Explanation of “(7) How to access” is partly revised.
Page 223 ”(8) Writing in the user ROM area” and “(9) Using the lock bit” are added.
Page 226 Figure 1.26.5 is partly revised.
Page 230 Explanation of “Program status (SR4)” is partly revised.
Page 232 Explanation of “ROM code protect function” is partly revised.
Page 234 Explanation of “Parallel I/O Mode” is partly revised.
Page 239 Explanation of “Overview of standard serial I/O mode 1 (clock synchronized)” is
Page 241 Explanation of “Page Read Command” is partly revised.
Page 243 Explanation of “Block Erase Command” is partly revised.
Page 245 Figure 1.29.10 and explanation of “Read Lock Bit Status Command” are partly
Page 247 Explanation of “Boot ROM area Output Command” is partly revised.
Page 250 Explanation of “Data Protection (Block Lock)” is partly revised.
Page 251 Explanation of “Block Status After Program (SR3)” is partly revised.
Page 252 Table 1.29.3 is partly revised.
Page 258 Explanation of “Page Read Command” is partly revised.
Page 259 Explanation of “Clear Status Register Command” is partly revised.
Page 259 Explanation of “Page Program Command” is partly revised.
Page 260 Explanation of “Block Erase Command” is partly revised.
Page 261 Explanation of “Erase All Unlocked Blocks Command” is partly revised.
Page 261 Explanation of “Lock Bit Program Command” is partly revised.
Page 262 Figure 1.29.30 and explanation of “Read Lock Bit Status Command” is partly
Page 264 Explanation of “Boot ROM Area Output Command” is partly revised.
Page 269 Table of “Differences in SFR between M16C/62A and M16C/62” is added.
Page 65 Explanation of “Watchdog Timer” is partly added.
Page 21 Explanation of “Processor Mode” is partly revised.
Page 65 Explanation of “Watchdog Timer” is partly revised.
Page 158 Explanation of “D-A Converter” is partly revised.
Page 83 Figure 1.14.8 is partly revised.
Page 176 Table 1.23.6 is partly revised.
partly revised.
revised.
revised.
M16C/62A Group data sheet
Contents for change
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
M16C / 62A Group
Mitsubishi microcomputers
Revision
01.3.27
01.4.23
01.5.10
01.4.6
date