M30624FGAFP#U3 Renesas Electronics America, M30624FGAFP#U3 Datasheet - Page 223

• Manufacturer Part Number: M30624FGAFP#U3
• Description: IC M16C MCU FLASH 100QFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/60r

Specifications of M30624FGAFP#U3

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: SIO, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 20K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-QFP
• For Use With: 867-1000 - KIT QUICK START RENESAS 62PM3062PT3-CPE-3 - EMULATOR COMPACT M16C/62P/30P
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

CPU Rewrite Mode (Flash Memory Version)
220
Figure 1.26.1. Flash memory control registers
Figure 1.26.2 shows a flowchart for setting/releasing the CPU rewrite mode. Figure 1.26.3 shows a flow-
chart for shifting to the low speed mode. Always perform operation as indicated in these flowcharts.
Flash memory control register 1
b7 b6 b5 b4 b3 b2 b1 b0
0
Flash memory control register 0
b7 b6 b5 b4 b3 b2 b1 b0
0
0
Note 1: For this bit to be set to “1”, the user needs to write a “0” and then a “1” to it in
Note 2: For this bit to be set to “1”, the user needs to write a “0” and then a “1” to it in succession
Note 3: Effective only when the CPU rewrite mode select bit = 1. Set this bit to 0 subsequently
Note 4: Write to this bit only when executing out of an area other than the internal flash memory.
Note : For this bit to be set to “1”, the user needs to write a “0” and then a “1” to it in
0
0
0
succession. When it is not this procedure, it is not enacted in “1”. This is necessary to
ensure that no interrupt or DMA transfer will be executed during the interval. Write to
this bit only when executing out of an area other than the internal flash memory. Also
only when NMI pin is “H” level. Clear this bit to “0” after read array command.
when the CPU rewrite mode select bit = “1”. When it is not this procedure, it is not
enacted in “1”. This is necessary to ensure that no interrupt or DMA transfer will be
executed during the interval.
after setting it to 1 (reset).
succession. When it is not this procedure, it is not enacted in “1”. This is necessary to
ensure that no interrupt or DMA transfer will be executed during the interval. During
parallel I/O mode,programming,erase or read of flash memory is not controlled by this
bit,only by external pins. Write to this bit only when executing out of an area other than
the internal flash memory.
0
0
Bit symbol
Reserved bit
Reserved bit
FMR13
Reserved bit
Bit symbol
FMR00
FMR01
FMR02
FMR03
FMR05
Nothing is assigned.
When write, set "0". When read, values are indeterminate.
Symbol
Symbol
FMR1
FMR0
Flash memory power
supply-OFF bit (Note)
RY/BY status flag
CPU rewrite mode
select bit (Note 1)
Lock bit disable
select bit (Note 2)
User ROM area select bit (
Note 4) (Effective in only
boot mode)
Flash memory reset bit
(Note 3)
Bit name
Bit name
Address
Address
03B6
03B7
16
16
0: Flash memory power supply is
1: Flash memory power supply-off
Must always be set to “0”
Must always be set to “0”
0: Busy (being written or erased)
1: Ready
0: Normal mode
1: CPU rewrite mode
0: Block lock by lock bit data is
1: Block lock by lock bit data is
0: Normal operation
1: Reset
Must always be set to “0”
0: Boot ROM area is accessed
1: User ROM area is accessed
When reset
XXXX0XXX
When reset
connected
(Software commands invalid)
(Software commands acceptable)
XX000001
enabled
disabled
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
2
2
Function
Function
M16C / 62A Group
Mitsubishi microcomputers
R
R W
R
R W
W
W