M30624FGAFP#U3 Renesas Electronics America, M30624FGAFP#U3 Datasheet - Page 137

IC M16C MCU FLASH 100QFP

M30624FGAFP#U3

Manufacturer Part Number
M30624FGAFP#U3
Description
IC M16C MCU FLASH 100QFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/60r
Datasheets

Specifications of M30624FGAFP#U3

Core Processor
M16C/60
Core Size
16-Bit
Speed
16MHz
Connectivity
SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
85
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
20K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
For Use With
867-1000 - KIT QUICK START RENESAS 62PM3062PT3-CPE-3 - EMULATOR COMPACT M16C/62P/30P
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
M30624FGAFP#U3M30624FGAFP
Manufacturer:
MITSUBIS
Quantity:
1
Company:
Part Number:
M30624FGAFP#U3M30624FGAFP
Manufacturer:
RENESAS
Quantity:
20 000
Company:
Part Number:
M30624FGAFP#U3M30624FGAFP#D3
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Company:
Part Number:
M30624FGAFP#U3M30624FGAFP#D5
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Company:
Part Number:
M30624FGAFP#U3
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Clock asynchronous serial I/O (UART) mode
134
Figure 1.16.23. Output timing of the parity error signal
Figure 1.16.24. SIM interface format
(a) Function for outputting a parity error signal
(b) Direct format/inverse format
During reception, with the error signal output enable bit (bit 7 of address 037D
can output an “L” level from the T
comparing with the case in which the error signal output enable bit (bit 7 of address 037D
signed “0”, the transmission completion interrupt occurs in the half cycle later of the transfer clock.
Therefore parity error signals can be detected by a transmission completion interrupt program. Figure
1.16.23 shows the output timing of the parity error signal.
Connecting the SIM card allows you to switch between direct format and inverse format. If you choose
the direct format, D
and output from TxD
Figure 1.16.24 shows the SIM interface format.
complete flag
• LSB first
Transfer
Receive
(inverse)
Transfer
(direct)
RxD
TxD
clock
TxD
TxD
clcck
2
2
2
2
“H”
“L”
“H”
“L”
“H”
“L”
“1”
“0”
0
2
data is output from TxD
.
ST
D0
X
D0
D7
D
2
pin when a parity error is detected. And during transmission,
D1
D1
D6
D2
D2
D5
2
. If you choose the inverse format, D
D3
D3
D4
Hi-Z
D4
D4
D3
D5
D5
D2
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
D6
D6
D1
ST : Start bit
P : Even Parity
SP : Stop bit
D7
D7
D0
P
P
P
P : Even parity
16
SP
M16C / 62A Group
) assigned “1”, you
Mitsubishi microcomputers
7
data is inverted
16
) is as-

Related parts for M30624FGAFP#U3