M30624FGAFP#U3 Renesas Electronics America, M30624FGAFP#U3 Datasheet - Page 235

• Manufacturer Part Number: M30624FGAFP#U3
• Description: IC M16C MCU FLASH 100QFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/60r

Specifications of M30624FGAFP#U3

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: SIO, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 20K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-QFP
• For Use With: 867-1000 - KIT QUICK START RENESAS 62PM3062PT3-CPE-3 - EMULATOR COMPACT M16C/62P/30P
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Functions To Inhibit Rewriting Flash Memory Version (Flash Memory Version)
232
Functions To Inhibit Rewriting Flash Memory Version
Figure 1.27.1. ROM code protect control address
To prevent the contents of the flash memory version from being read out or rewritten easily, the device
incorporates a ROM code protect function for use in parallel I/O mode and an ID code check function for
use in standard serial I/O mode.
ROM code protect function
The ROM code protect function is used to prohibit reading out or modifying the contents of the flash
memory during parallel I/O mode and is set by using the ROM code protect control address register
(0FFFFF
ists in the user ROM area.)
If one of the pair of ROM code protect bits is set to 0, ROM code protect is turned on, so that the contents
of the flash memory version are protected against readout and modification. ROM code protect is imple-
mented in two levels. If level 2 is selected, the flash memory is protected even against readout by a
shipment inspection LSI tester, etc. When an attempt is made to select both level 1 and level 2, level 2 is
selected by default.
If both of the two ROM code protect reset bits are set to “00,” ROM code protect is turned off, so that the
contents of the flash memory version can be read out or modified. Once ROM code protect is turned on,
the contents of the ROM code protect reset bits cannot be modified in parallel I/O mode. Use the serial I/
O or some other mode to rewrite the contents of the ROM code protect reset bits.
ROM code protect control address
b7
16
b6
). Figure 1.27.1 shows the ROM code protect control address (0FFFFF
b5
Note 1: When ROM code protect is turned on, the on-chip flash memory is protected against
Note 2: When ROM code protect level 2 is turned on, ROM code readout by a shipment
Note 3: The ROM code protect reset bits can be used to turn off ROM code protect level 1 and
b4
b3
readout or modification in parallel input/output mode.
inspection LSI tester, etc. also is inhibited.
ROM code protect level 2. However, since these bits cannot be changed in parallel input/
output mode, they need to be rewritten in serial input/output or some other mode.
b2
b1
1 1
b0
Bit symbol
ROMCP2
ROMCP1
Reserved bit
ROMCR
Symbol
ROMCP
ROM code protect level
2 set bit (Note 1, 2)
ROM code protect reset
bit (Note 3)
ROM code protect level
1 set bit (Note 1)
0FFFFF
Address
Bit name
16
When reset
b5 b4
00: Protect removed
01: Protect set bit effective
10: Protect set bit effective
11: Protect set bit effective
FF
b3 b2
00: Protect enabled
01: Protect enabled
10: Protect enabled
11: Protect disabled
b7 b6
00: Protect enabled
01: Protect enabled
10: Protect enabled
11: Protect disabled
Always set this bit to 1.
16
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Function
16
). (This address ex-
M16C / 62A Group
Mitsubishi microcomputers