AT91SAM9261-CJ-999 Atmel, AT91SAM9261-CJ-999 Datasheet - Page 30

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AT91SAM9261-CJ-999

Manufacturer Part Number
AT91SAM9261-CJ-999
Description
IC MCU ARM9 ULTRA LP 217LFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheet

Specifications of AT91SAM9261-CJ-999

Core Processor
ARM9
Core Size
16/32-Bit
Speed
190MHz
Connectivity
EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
DMA, LCD, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
32KB (32K x 8)
Program Memory Type
ROM
Ram Size
192K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 1.32 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
217-LFBGA
For Use With
AT91SAM9261-EK - KIT EVAL FOR AT91SAM926EJ-SAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
AT91SAM9261-CJ-999
Manufacturer:
Atmel
Quantity:
10 000
10.3.1.5
10.3.1.6
10.3.1.7
10.3.1.8
10.3.1.9
10.3.1.10
30
AT91SAM9261 Preliminary
NAND Flash Interface
Compact Flash Interface
SPI0 and the MultiMedia Card Interface
USARTs
Clock Outputs
Interrupt Lines
Using the NAND Flash interface prevents:
Using the CompactFlash interface prevents:
As the DataFlash Card is compatible with the SDCard, it is useful to multiplex SPI and MCI.
Here, the SPI0 signal is multiplexed with the MCI.
• using the three Timer Counter channels’ outputs and trigger inputs
• using the SSC2
• using NCS3, NCS6 and NCS7 to access other parallel devices
• using NCS4 and/or NCS5 to access other parallel devices
• Using the USART1 and USART2 control signals prevents using the ETM.
• Alternatively, using USART0 with its control signals prevents using some clock outputs and
• Using the clock outputs multiplexed with the PIO A prevents using the Debug Unit and/or the
• Alternatively, using the second implementation of the clock outputs prevents using the LCD
• Using FIQ prevents using the USART0 control signals.
• Using IRQ0 prevents using the NWAIT EBI signal.
• Using the IRQ1 and/or IRQ2 prevents using the SPI1.
interrupt lines.
Two Wire Interface.
Controller Interface and/or USART0.
6062M–ATARM–23-Mar-09

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