AT91SAM9261-CJ-999 Atmel, AT91SAM9261-CJ-999 Datasheet - Page 719
AT91SAM9261-CJ-999
Manufacturer Part Number
AT91SAM9261-CJ-999
Description
IC MCU ARM9 ULTRA LP 217LFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheet
1.AT91SAM9261-CJ-999.pdf
(749 pages)
Specifications of AT91SAM9261-CJ-999
Core Processor
ARM9
Core Size
16/32-Bit
Speed
190MHz
Connectivity
EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
DMA, LCD, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
32KB (32K x 8)
Program Memory Type
ROM
Ram Size
192K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 1.32 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
217-LFBGA
For Use With
AT91SAM9261-EK - KIT EVAL FOR AT91SAM926EJ-SAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
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42.3.17.3
42.3.18
42.3.18.1
42.3.18.2
42.3.18.3
42.3.18.4
6062M–ATARM–23-Mar-09
USART
UHP: Remote Wakeup event
USART: CTS signal in Hardware Handshake
USART: RTS unexpected behavior
USART: TXD signal is Floating in Modem and Hardware Handshaking Mode
USART: DCD is Active High Instead of Low
This problem can be avoided if the system can guarantee that no buffer underrun occurs during
the transfer.
Conditions:
When a Remote Wakeup event occurs on a downstream port, the OHCI Host controller begins
sending resume signaling to the device. The Host controller is supposed to send this resume
signaling for 20 ms. However, if the driver sets the HcControl.HCFS into USBOPERATIONAL
state during the resume event, then the Host controller terminates sending the resume signal
with an EOP to the device.
Consequence: If the Device does not recognize the resume (<20 ms) event, then the Device will
remain in suspend state.
Host stack can do a port resume after it sets the HcControl.HCFS to USBOPERATIONAL.
When Hardware Handshaking is used and if CTS goes low near the end of the starting bit of the
transmitter, a character is lost.
CTS must not go low during a time slot comprised between 2 Master Clock periods before the
rising edge of the starting bit and 16 Master Clock periods after the rising edge of the starting bit.
None.
TXD signal should be pulled up in Modem and Hardware Handshaking mode.
TXD is multiplexed with a PIO which integrates a pull-up resistor. This internal pullup needs to
be enabled.
DCD signal is active at “High” level in USART block (Modem Mode).
DCD should be active at “Low” level.
1. Setting the receiver to hardware handshaking mode drops RTS line to low level even if
2. Disabling the receiver during a PDC transfert while RXBUFF flag is '0' has no effect on
Problem Fix/Workaround
Problem Fix/Workaround
Problem Fix/Workaround
Problem Fix/Workaround
Problem Fix/Workaround
Problem Fix/Workaround
the receiver is still turned off. USART needs to be completely configured and started
before setting the receiver to hardware handshaking mode.
RTS. The only way to get the RTS line rising to high level is to reset both PDMA buffers
by writing the value '0' in both counter registers.
AT91SAM9261 Preliminary
719
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