AT91SAM9261-CJ-999 Atmel, AT91SAM9261-CJ-999 Datasheet - Page 735

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AT91SAM9261-CJ-999

Manufacturer Part Number
AT91SAM9261-CJ-999
Description
IC MCU ARM9 ULTRA LP 217LFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheet

Specifications of AT91SAM9261-CJ-999

Core Processor
ARM9
Core Size
16/32-Bit
Speed
190MHz
Connectivity
EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
DMA, LCD, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
32KB (32K x 8)
Program Memory Type
ROM
Ram Size
192K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 1.32 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
217-LFBGA
For Use With
AT91SAM9261-EK - KIT EVAL FOR AT91SAM926EJ-SAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT91SAM9261-CJ-999
Manufacturer:
Atmel
Quantity:
10 000
6062M–ATARM–23-Mar-09
Doc. Rev.
6062C
Date
26-Jan-06
Comments
Corrected MIPS and speed on page 1.
Added information on EBI NCS0 when BMS = 0 in
on page
Removed note (3) regarding ALE and CLE signals from
Devices Connections,” on page
Corrected values for SMC_SETUP, SMC_PULSE, SMC_CYCLE and SMC_MODE
registers in
“SMC Register Mapping,” on page
Removed all references to High-speed Register in
Corrected PRES description in
262.
SPI: Updated
FLOAD.
SPI: Updated information on SPI_RDR in
page 357.
Register” on page
SPI: Changed
UDP: New documentation integrated.
Errata: Added errata
Section 41.5.6 ”Clock Divider Limitation” on page 655
655.
17.
Added information to SWRST bit description in
Table 21-5, “Reset Values of Timing Parameters,” on page 181
Figure 30-9, “Slave Mode Functional Bloc Diagram,” on page 363
Section 29.6.3.8 ”Mode Fault Detection” on page
365. Corrected equations in DLYBCT bit description on
Section 41.5.3 ”Disabling Does not Operate Correctly” on page 654
Section 25.10.11 ”PMC Master Clock Register” on page
145.
202.
Section 30.6.3 “Master Mode Operations” on
AT91SAM9261 Preliminary
”SDRAM Controller (SDRAMC)”
Table 8-3, “Internal Memory Mapping,”
and
Table 20-4, “EBI Pins and External
Section 30.7.1 “SPI Control
Section 41.7 ”UHP” on page
367.
page
and
Table 21-9,
376.
to remove
section.
to
Change
Request
Reference
2292
1729
1726
1603
1542
1543
1676
735

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