AT91SAM9261-CJ-999 Atmel, AT91SAM9261-CJ-999 Datasheet - Page 554

• Manufacturer Part Number: AT91SAM9261-CJ-999
• Description: IC MCU ARM9 ULTRA LP 217LFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9261-CJ-999

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 190MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: DMA, LCD, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: ROM
• Ram Size: 192K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 217-LFBGA
• For Use With: AT91SAM9261-EK - KIT EVAL FOR AT91SAM926EJ-SAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -

35.9
Table 35-6.
Note:
6062M–ATARM–23-Mar-09
0x100-0x124
0x18 - 0x1C
0x38 - 0x3C
0x50-0xFC
Offset
0x0C
0x2C
0x4C
0x00
0x04
0x08
0x10
0x14
0x20
0x24
0x28
0x30
0x34
0x40
0x44
0x48
MultiMedia Card Interface (MCI) User Interface
1. The response register can be read by N accesses at the same MCI_RSPR or at consecutive addresses (0x20 to 0x2C).
N depends on the size of the response.
Register Mapping
Register
Control Register
Mode Register
Data Timeout Register
SD Card Register
Argument Register
Command Register
Reserved
Response Register
Response Register
Response Register
Response Register
Receive Data Register
Transmit Data Register
Reserved
Status Register
Interrupt Enable Register
Interrupt Disable Register
Interrupt Mask Register
Reserved
Reserved for the PDC
(1)
(1)
(1)
(1)
Register Name
MCI_CMDR
MCI_SDCR
MCI_ARGR
MCI_DTOR
MCI_RSPR
MCI_RSPR
MCI_RSPR
MCI_RSPR
MCI_RDR
MCI_TDR
MCI_IMR
MCI_IER
MCI_IDR
MCI_MR
MCI_CR
MCI_SR
AT91SAM9261 Preliminary
–
–
–
–
Read-write
Read-write
Read-write
Read-write
Write-only
Write-only
Read-only
Read-only
Read-only
Read-only
Read-only
Write-only
Read-only
Write-only
Write-only
Read-only
Access
–
–
–
–
0xC0E5
Reset
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
–
–
–
–
–
–
–
–
–
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