Z32AN00NW200SG Zilog, Z32AN00NW200SG Datasheet - Page 111

• Manufacturer Part Number: Z32AN00NW200SG
• Description: IC ARM922T MCU 200MHZ 256-BGA
• Manufacturer: Zilog
• Series: Encore!® 32r

Specifications of Z32AN00NW200SG

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, IrDA, SmartCard, SPI, UART/USART, USB OTG
• Peripherals: DMA, LCD, Magnetic Card Reader, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.71 V ~ 3.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• For Use With: 269-4713 - KIT DEV ENCORE 32 SERIES
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: 269-4717

Z32AN Series Data Sheet
11.8.3 Control Registers
11.8.3.1
11.8.3.2
DS0200-003
31:06
31:03
Offset 034h: RTC_ACTRL – RTC Alarm Control
Offset 038h: RTC_CTRL – RTC Control
Bits
Bits
05
04
03
02
01
00
02
01
00
RW1C
Type
Type
RW
RW
RW
RW
RW
RW
WO
RW
RO
RO
Offset
034h
038h
Reset
Reset
Undef
Undef
Undef
Undef
Undef
Undef
Undef
Undef
0
0
0
Description
Reserved
Year Alarm Enable (AYR_EN): When set, include year in alarm compare.
Month Alarm Enable (AMON_EN): When set, include month in alarm compare.
Day-of-the-Month Alarm Enable (ADOM_EN): When set, Include day in alarm
compare.
Hour Alarm Enable (AHRS_EN): When set, include hour in alarm compare.
Minute Alarm Enable (AMIN_EN): When set, include min in alarm compare.
Seconds Alarm Enable (ASEC_EN): When set, include sec in alarm compare.
Description
Reserved
Load Ripple (LOAD_RIPPLE): This bit is used only for manufacturing test. Writing
one to this bit forces the RTC ripple counter to a value such that a 1 Hz clock positive
edge is generated upon the next rising edge of the 32 kHz clock. Always returns ‘0’ on
reads.
RTC interrupt status (ALARM_STATUS):
alarm compare. When set, the interrupt is active.
Interrupt on Alarm Condition (ALARM_EN): When set, enabled.
RTC_ACTRL
RTC_CTRL
Register
Description
Alarm Control
RTC Control
The interrupt is activated on an RTC
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