Z32AN00NW200SG Zilog, Z32AN00NW200SG Datasheet - Page 149
Z32AN00NW200SG
Manufacturer Part Number
Z32AN00NW200SG
Description
IC ARM922T MCU 200MHZ 256-BGA
Manufacturer
Zilog
Series
Encore!® 32r
Datasheet
1.Z32AN00NW200SG.pdf
(196 pages)
Specifications of Z32AN00NW200SG
Core Processor
ARM9
Core Size
16/32-Bit
Speed
200MHz
Connectivity
EBI/EMI, IrDA, SmartCard, SPI, UART/USART, USB OTG
Peripherals
DMA, LCD, Magnetic Card Reader, POR, PWM, WDT
Number Of I /o
76
Program Memory Type
ROMless
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.71 V ~ 3.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-LBGA
For Use With
269-4713 - KIT DEV ENCORE 32 SERIES
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Other names
269-4717
Available stocks
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Part Number
Manufacturer
Quantity
Price
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Z32AN Series Data Sheet
17.5.2.4
DS0200-003
31:08
07:06
05:04
03:01
Offset 008h: UARTx_IIR – UART Interrupt Identification Registers
Bits
00
Type
RO
RO
RO
RO
RO
Reset
0
0
0
0
1
Description
Reserved
FSTS
Reserved
Interrupt Status Code (INTSTS): The code indicated in these three bits is valid only
if INTBIT is 0. If two internal interrupt sources are active and their respective enable
bits are High, only the higher priority interrupt is seen by the application. The lower-
priority interrupt code is indicated only after the higher-priority interrupt is serviced.
Interrupt Bit (INTBIT): 0 = There is an active interrupt source within the UART. 1
= There is not an active interrupt source within the UART.
00 = FIFO is disabled.
10 = Receive FIFO is disabled (Multi-drop Mode).
11 = FIFO is enabled.
Bits
011
010
110
101
001
000
Priority
Highest
Second
Lowest
Fourth
Third
Fifth
Receiver Line Status
Interrupt Type
Receive Data Ready or Trigger Level
Character Time-out
Transmission Complete
Transmit Buffer Empty
Modem Status
Page 136
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