Z32AN00NW200SG Zilog, Z32AN00NW200SG Datasheet - Page 168

• Manufacturer Part Number: Z32AN00NW200SG
• Description: IC ARM922T MCU 200MHZ 256-BGA
• Manufacturer: Zilog
• Series: Encore!® 32r

Specifications of Z32AN00NW200SG

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, IrDA, SmartCard, SPI, UART/USART, USB OTG
• Peripherals: DMA, LCD, Magnetic Card Reader, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.71 V ~ 3.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• For Use With: 269-4713 - KIT DEV ENCORE 32 SERIES
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: 269-4717

Z32AN Series Data Sheet
Chapter 19: Universal Serial Bus (USB)
19.1 Buffer Descriptor Table
DS0200-003
The USB controller is an AHB controller that can be configured as either a host or device and supports the
On-The-Go protocol. Features:
A Buffer Descriptor Table (BDT) in system memory manages USB endpoint communications. It resides on a
512-byte boundary pointed to by the BDT Page Registers. Every endpoint direction has two eight-byte
entries, allowing software to process one descriptor while hardware is processing the other descriptor.
Software manages buffers by updating the BDT. A semaphore mechanism is used to distinguish who is
allowed to update the BDT. OWN is cleared when the descriptor entry is owned by software, and set when
owned by the controller. The descriptor also contains pointers to where the data buffer resides in system
memory. The buffer descriptor provides endpoint control information for the controller and software. The
controller uses the descriptor to determine:
Software uses the data stored in the BDs to determine:
The format for the Buffer Descriptor is shown in Figure 19-1.
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Complies with USB specification rev2.0
Complies with On The Go (OTG) Supplement to the USB2.0 specification
Supports 12Mbps and 1.5Mbps serial data transmission
USB2.0 for integration in OTG Dual Role Device applications
32-bit DMA engine
Supports all device classes
Who owns the buffer in system memory
Data0 or Data1 PID
Release OWN upon packet completion
No address increment (FIFO Mode)
Data toggle synchronization enable
How much data is to be transmitted or received
Where the buffer resides in system memory
Who owns the buffer in system memory
Data0 or Data1 PID
The received TOKEN PID
How much data was transmitted or received
Where the buffer resides in system memory
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