Z32AN00NW200SG Zilog, Z32AN00NW200SG Datasheet - Page 92

• Manufacturer Part Number: Z32AN00NW200SG
• Description: IC ARM922T MCU 200MHZ 256-BGA
• Manufacturer: Zilog
• Series: Encore!® 32r

Specifications of Z32AN00NW200SG

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, IrDA, SmartCard, SPI, UART/USART, USB OTG
• Peripherals: DMA, LCD, Magnetic Card Reader, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.71 V ~ 3.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• For Use With: 269-4713 - KIT DEV ENCORE 32 SERIES
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: 269-4717

Z32AN Series Data Sheet
10.3.2 Smart Card UART Mode Registers (
10.3.2.1
10.3.2.2
DS0200-003
31:08
07:00
31:08
07:00
Offset 00h: SC_RBR – Receive Buffer
Offset 00h: SC_THR – Transmit Holding
Bits
Bits
►Note: RBR and THR share the same address space.
►Note: RBR and THR share the same address space.
Type
Type
RW
RW
RO
RO
Offset
000h
000h
004h
008h
00Ch
010h
014h
018h
01Ch
020h
024h
028h
02Ch
030h
034h
038h
Reset
Reset
00h
00h
0
0
SC_AUTO_PARITY
SC_NUM_REP
SC_REV_DLY
SC_CLK_DIV
SC_NUMTX
SC_NUMRX
SC_NUMPE
SC_GTIME
Register
SC_RBR
SC_THR
SC_BRR
SC_LCR
SC_IER
SC_LSR
SC_IIR
SC_GR
Description
Reserved
Data (DATA): Receive data.
Description
Reserved
Data (DATA): Transmit data.
Description
Receiver Buffer Register
Transmitter Holding Register
Interrupt Enable Register
Interrupt Identification Register
Line Control Register
Baud Rate Register
Line Status Register
Global Register
Guard time Register
Number of repetition in Tx Register
Reverse delay Register
Clock Divide Register
Number of Data to Send
Number of Repetition in RX for parity error
Number of Data to Receive
Automatic Parity
Base: SC0 → FFFF0100h, SC1 → FFFF0200h
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