Z32AN00NW200SG Zilog, Z32AN00NW200SG Datasheet - Page 40

IC ARM922T MCU 200MHZ 256-BGA

Z32AN00NW200SG

Manufacturer Part Number
Z32AN00NW200SG
Description
IC ARM922T MCU 200MHZ 256-BGA
Manufacturer
Zilog
Series
Encore!® 32r
Datasheet

Specifications of Z32AN00NW200SG

Core Processor
ARM9
Core Size
16/32-Bit
Speed
200MHz
Connectivity
EBI/EMI, IrDA, SmartCard, SPI, UART/USART, USB OTG
Peripherals
DMA, LCD, Magnetic Card Reader, POR, PWM, WDT
Number Of I /o
76
Program Memory Type
ROMless
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.71 V ~ 3.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-LBGA
For Use With
269-4713 - KIT DEV ENCORE 32 SERIES
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Other names
269-4717

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
Z32AN00NW200SG
Manufacturer:
Zilog
Quantity:
10 000
Z32AN Series Data Sheet
6.8.13 INTC_CFGN – Channel N Configuration Register
6.8.14 Offset F00h: INTC_IVEC – IRQ Vector Register
6.8.15 Offset F04h: INTC_FVEC – FIQ Vector Register
DS0200-003
There is one register per interrupt channel, as shown in the table above. The bits in each register are
described in the table below.
31:04
02:00
31:00
31:00
Bits
Bits
Bits
03
Type
Type
Type
Offset
RW
RW
100h
104h
108h
10Ch
110h
114h
118h
11Ch
RO
RO
RO
Reset
Reset
Reset
Undef
Undef
000
Channel
0
0
0
1
2
3
4
5
6
7
Description
Reserved
IRQ/FIQ (IRQ_FIQ): When cleared, channel N produces an IRQ. When set, channel
N produces an FIQ.
Priority (PRI): Specifies the interrupt priority for channel N.
Description
Interrupt Vector (VEC):
highest priority IRQ interrupt. Reading this register pushes the priority of the associated
interrupt onto the IRQ Processor Stack (see section 6.6). If no enabled IRQ is active,
contains the value of INTC_DFLT.
Description
Fast IRQ Vector (VEC): Contains the value of INTC_VECN associated with the highest
priority FIQ interrupt. If no enabled FIQ is active, contains the value of INTC_DFLT.
 000: Priority 0 (highest priority)
 ...
 111: Priority 7 (lowest priority)
Offset
120h
124h
128h
12Ch
130h
134h
138h
13Ch
Channel
10
11
12
13
14
15
8
9
Offset
Contains the value of INTC_VECN associated with the
140h
144h
148h
14Ch
150h
154h
158h
15Ch
Channel
16
17
18
19
20
21
22
23
Offset
160h
164h
168h
16Ch
170h
174h
178h
17Ch
Channel
24
25
26
27
28
29
30
31
Page 27

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