Z32AN00NW200SG Zilog, Z32AN00NW200SG Datasheet - Page 169

• Manufacturer Part Number: Z32AN00NW200SG
• Description: IC ARM922T MCU 200MHZ 256-BGA
• Manufacturer: Zilog
• Series: Encore!® 32r

Specifications of Z32AN00NW200SG

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, IrDA, SmartCard, SPI, UART/USART, USB OTG
• Peripherals: DMA, LCD, Magnetic Card Reader, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.71 V ~ 3.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-LBGA
• For Use With: 269-4713 - KIT DEV ENCORE 32 SERIES
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: 269-4717

Z32AN Series Data Sheet
DS0200-003
31:26
25:16
15:08
05:02
01:00
31:00
Bits
Bits
07
06
05
04
03
02
Description
000000
BYTE_COUNT: 10-bit Byte Count. The USB block updates this field upon the completion of a receive with
the byte count of the data received.
00000000
OWN: When set, the controller has exclusive access to the descriptor. When cleared, software has exclusive
access to the descriptor. Hardware clears this bit when it completes a token, except when KEEP = ‘1’.
DATA0_1: DATA0 (= ‘0’) or a DATA1 (= ‘1’) was transmitted or received. Unchanged by hardware.
KEEP: When set, once OWN is set the descriptor remains owned by hardware. This bit is typically set for
isochronous endpoints that are feeding a FIFO. NINC is normally also set when this bit is set to prevent
address increment. If set, this bit is unchanged by the USB block, otherwise bit 3 of the current token PID is
written back in to the descriptor by hardware.
NINC: This bit disables DMA engine address increment. This forces the DMA engine to read or write from
the same address. This bit is typically set with KEEP for isochronous endpoints that are interfacing to a
FIFO. If KEEP=1 this bit is unchanged by the controller, otherwise bit 2 of the current token PID is written
back in to the BD by the controller.
DTS: When set, enables the controller to perform Data Toggle Synchronization. If KEEP is set this bit is
unchanged by the controller, otherwise bit 1 of the current token PID is written back in to the descriptor by
the controller.
BDT_STALL: When set, the controller issues a STALL handshake if a token is received that uses this
descriptor. The descriptor is not consumed (OWN remains and the rest of the table is unchanged). If
KEEP=1 this bit is unchanged by the controller, otherwise bit 0 of the current token PID is written back in to
the descriptor by the controller.
TOKEN_PID: This is written back to the descriptor by the controller when a transfer completes. The
values written back are the token PID values from the USB specification: 1h for an OUT, 9h for an IN, or Dh
for a SETUP. In host mode this field is used to report the last returned PID or a transfer status indication.
The possible values returned are: 3h (DATA0), Bh (DATA1), 2h (ACK), Eh (STALL), Ah (NAK), 0h (Bus
Timeout), or Fh (Data Error).
00
Description
BUFFER_ADDRESS: Data buffer address in system memory.
Table 19-1 : Buffer Descriptor - Word 0
Table 19-2 : Buffer Descriptor - Word 1
Figure 19-1: Buffer Descriptor Entry
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