MC68HC711E20CFN2 Freescale Semiconductor, MC68HC711E20CFN2 Datasheet - Page 175

• Manufacturer Part Number: MC68HC711E20CFN2
• Description: IC MCU 20K 2MHZ OTP 52-PLCC
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MC68HC711E20CFN2

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 2MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 38
• Program Memory Size: 20KB (20K x 8)
• Program Memory Type: OTP
• Eeprom Size: 512 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 52-PLCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

8.8.2 Serial Peripheral Status Register
M68HC11E Family — Rev. 3.2
MOTOROLA
Address:
SPIF — SPI Interrupt Complete Flag
WCOL — Write Collision Bit
Bit 5 — Unimplemented
MODF — Mode Fault Bit
Bits [3:0] — Unimplemented
Reset:
Read:
Write:
SPIF is set upon completion of data transfer between the processor
and the external device. If SPIF goes high, and if SPIE is set, a serial
peripheral interrupt is generated. To clear the SPIF bit, read the SPSR
with SPIF set, then access the SPDR. Unless SPSR is read (with
SPIF set) first, attempts to write SPDR are inhibited.
Clearing the WCOL bit is accomplished by reading the SPSR (with
WCOL set) followed by an access of SPDR. Refer to
Select
Always reads 0
To clear the MODF bit, read the SPSR (with MODF set), then write to
the SPCR. Refer to
Always read 0
0 = No write collision
1 = Write collision
0 = No mode fault
1 = Mode fault
Figure 8-4. Serial Peripheral Status Register (SPSR)
$1029
SPIF
Bit 7
0
and
Serial Peripheral Interface (SPI)
8.7 SPI System
= Unimplemented
WCOL
6
0
8.6.4 Slave Select
5
0
Errors.
MODF
4
0
and
3
0
Serial Peripheral Interface (SPI)
8.7 SPI System
2
0
8.6.4 Slave
1
0
Technical Data
SPI Registers
Errors.
Bit 0
0
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