MC68HC711E20CFN2 Freescale Semiconductor, MC68HC711E20CFN2 Datasheet - Page 82

• Manufacturer Part Number: MC68HC711E20CFN2
• Description: IC MCU 20K 2MHZ OTP 52-PLCC
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MC68HC711E20CFN2

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 2MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 38
• Program Memory Size: 20KB (20K x 8)
• Program Memory Type: OTP
• Eeprom Size: 512 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 52-PLCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Operating Modes and On-Chip Memory
4.4.2 Mode Selection
Technical Data
82
The four mode variations are selected by the logic states of the MODA
and MODB pins during reset. The MODA and MODB logic levels
determine the logic state of SMOD and the MDA control bits in the
highest priority I-bit interrupt and miscellaneous (HPRIO) register.
After reset is released, the mode select pins no longer influence the
MCU operating mode. In single-chip operating mode, the MODA pin is
connected to a logic level 0. In expanded mode, MODA is normally
connected to V
also functions as the load instruction register LIR pin when the MCU is
not in reset. The open-drain active low LIR output pin drives low during
the first E cycle of each instruction. The MODB pin also functions as
standby power input (V
maintained in absence of V
Refer to
control bits, and the four operating modes.
A normal mode is selected when MODB is logic 1 during reset. One of
three reset vectors is fetched from address $FFFA–$FFFF, and program
execution begins from the address indicated by this vector. If MODB is
logic 0 during reset, the special mode reset vector is fetched from
addresses $BFFA–$BFFF, and software has access to special test
features. Refer to
MODB
1
1
0
0
Input Levels
Operating Modes and On-Chip Memory
at Reset
Table
Table 4-1. Hardware Mode Select Summary
MODA
4-1, which is a summary of mode pin operation, the mode
DD
0
1
0
1
Section 5. Resets and
through a pullup resistor of 4.7 k . The MODA pin
STBY
Special test
Single chip
Expanded
Bootstrap
DD
Mode
), which allows RAM contents to be
.
RBOOT
Interrupts.
0
0
1
0
Control Bits in HPRIO
M68HC11E Family — Rev. 3.2
(Latched at Reset)
SMOD
0
0
1
1
MOTOROLA
MDA
0
1
0
1