EP1S20F780I6N Altera, EP1S20F780I6N Datasheet - Page 734
EP1S20F780I6N
Manufacturer Part Number
EP1S20F780I6N
Description
IC STRATIX FPGA 20K LE 780-FBGA
Manufacturer
Altera
Series
Stratix®r
Specifications of EP1S20F780I6N
Number Of Logic Elements/cells
18460
Number Of Labs/clbs
1846
Total Ram Bits
1669248
Number Of I /o
586
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
780-FBGA
Family Name
Stratix
Number Of Logic Blocks/elements
18460
# I/os (max)
586
Frequency (max)
450.05MHz
Process Technology
0.13um (CMOS)
Operating Supply Voltage (typ)
1.5V
Logic Cells
18460
Ram Bits
1669248
Operating Supply Voltage (min)
1.425V
Operating Supply Voltage (max)
1.575V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
780
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP1S20F780I6N
Manufacturer:
ALTERA
Quantity:
3 000
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Configuration Schemes
Figure 11–6. Multi-Device PS Configuration with a Download Cable
Notes to
(1)
(2)
(3)
11–16
Stratix Device Handbook, Volume 2
You should connect the pull-up resistor to the same supply voltage as the MasterBlaster (VIO pin) or ByteBlasterMV
cable.
The pull-up resistors on the DATA0 and DCLK pins are only needed if the download cable is the only configuration
scheme used on the board. This is to ensure that the DATA0 and DCLK pins are not left floating after configuration.
For example, if the design also uses a configuration device, the pull-up resistors on the DATA0 and DCLK pins are
not necessary.
V
MasterBlaster Serial/USB Communications Cable Data Sheet for this value.
IO
10 kΩ
is a reference voltage for the MasterBlaster output driver. V
Figure
V CC (1)
10 kΩ
11–6:
V CC (1)
(2)
GND
GND
V CC
V CC
If you are using a download cable to configure device(s) on a board that
also has configuration devices, you should electrically isolate the
configuration devices from the target device(s) and cable. One way to
isolate the configuration devices is to add logic, such as a multiplexer, that
can select between the configuration devices and the cable. The
multiplexer device should allow bidirectional transfers on the nSTATUS
and CONF_DONE signals. Another option is to add switches to the five
common signals (CONF_DONE, nSTATUS, DCLK, nCONFIG, and DATA0)
between the cable and the configuration devices. The last option is to
remove the configuration devices from the board when configuring with
the cable.
a download cable to configure a Stratix or Stratix GX device.
Stratix GX Device 2
Stratix GX Device 1
DATA0
nCONFIG
DATA0
nCONFIG
MSEL0
MSEL1
MSEL2
MSEL0
MSEL1
MSEL2
nCE
nCE
Stratix or
Stratix or
CONF_DONE
Figure 11–7
CONF_DONE
nSTATUS
nSTATUS
DCLK
nCEO
nCEO
DCLK
10 kΩ
shows a combination of a configuration device and
N.C.
V CC (1)
V CC (1)
IO
should match the device’s V
10 kΩ
(2)
V CC (1)
10 kΩ
Pin 1
10-Pin Male Header
Download Cable
(PS Mode)
Altera Corporation
CCIO
GND
. See the
V CC
VIO (3)
GND
July 2005
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