EP1S20F780I6N Altera, EP1S20F780I6N Datasheet - Page 776
EP1S20F780I6N
Manufacturer Part Number
EP1S20F780I6N
Description
IC STRATIX FPGA 20K LE 780-FBGA
Manufacturer
Altera
Series
Stratix®r
Specifications of EP1S20F780I6N
Number Of Logic Elements/cells
18460
Number Of Labs/clbs
1846
Total Ram Bits
1669248
Number Of I /o
586
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
780-FBGA
Family Name
Stratix
Number Of Logic Blocks/elements
18460
# I/os (max)
586
Frequency (max)
450.05MHz
Process Technology
0.13um (CMOS)
Operating Supply Voltage (typ)
1.5V
Logic Cells
18460
Ram Bits
1669248
Operating Supply Voltage (min)
1.425V
Operating Supply Voltage (max)
1.575V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
780
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP1S20F780I6N
Manufacturer:
ALTERA
Quantity:
3 000
- Current page: 776 of 864
- Download datasheet (11Mb)
Device Configuration Pins
11–58
Stratix Device Handbook, Volume 2
nCS/CS
RUnLU
PGM[2..0]
Table 11–15. Dedicated Configuration Pins on the Stratix or Stratix GX Device
Pin Name
I/O
N/A if using
Remote
Configuration;
I/O if not
N/A if using
Remote
Configuration;
I/O if not using
User Mode
PPA
Remote
Configuration
in FPP, PS or
PPA
Remote
Configuration
in FPP, PS or
PPA
Configuration
Scheme
Input
Input
Input
Pin Type
Chip-select inputs. A low on
CS
The
during configuration and initialization.
During the PPA configuration mode, it is only
required to use either the
Therefore, if only one chip-select input is used,
the other must be tied to the active state. For
example,
toggled to control configuration.In non-PPA
schemes, it functions as a user I/O during
configuration, which means it is tri-stated.
After PPA configuration,
available as a user I/Os and the state of these
pins depends on the Dual-Purpose Pin
settings.
Input that selects between remote update and
local update. A logic high (1.5-V, 1.8-V, 2.5-V,
3.3-V) selects remote update and a logic low
selects local update.
When not using remote update or local update
configuration modes, this pins is available as
general-purpose user I/O pin.
These output pins select one of eight pages in
the memory (either flash or enhanced
configuration device) when using a remote
configuration mode.
When not using remote update or local update
configuration modes, these pins are available
as general-purpose user I/O pins.
select the target device for configuration.
nCS
and
nCS
CS
can be tied to GND while
Description
pins must be held active
(Part 8 of 8)
nCS
nCS
Altera Corporation
nCS
and
or
and a high on
CS
CS
July 2005
pin.
are
CS
is
Related parts for EP1S20F780I6N
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
CYCLONE II STARTER KIT EP2C20N
Manufacturer:
Altera
Datasheet:
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 35 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 15 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 30 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 10ns
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 7ns
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Classic EPLD
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 10ns
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 25 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet: