ATmega88PA Automotive Atmel Corporation, ATmega88PA Automotive Datasheet - Page 104

• Manufacturer Part Number: ATmega88PA Automotive
• Manufacturer: Atmel Corporation

15.9
15.9.1
104
Register Description
Atmel ATmega48PA/88PA/168PA [Preliminary]
TCCR0A – Timer/Counter Control Register A
• Bits 7:6 – COM0A1:0: Compare Match Output A Mode
These bits control the Output Compare pin (OC0A) behavior. If one or both of the COM0A1:0
bits are set, the OC0A output overrides the normal port functionality of the I/O pin it is con-
nected to. However, note that the Data Direction Register (DDR) bit corresponding to the
OC0A pin must be set in order to enable the output driver.
When OC0A is connected to the pin, the function of the COM0A1:0 bits depends on the
WGM02:0 bit setting.
bits are set to a normal or CTC mode (non-PWM).
Table 15-2.
Table 15-3
mode.
Table 15-3.
Note:
Bit
0x24 (0x44)
Read/Write
Initial Value
COM0A1
COM0A1
0
0
1
1
0
0
1
1
1. A special case occurs when OCR0A equals TOP and COM0A1 is set. In this case, the
shows the COM0A1:0 bit functionality when the WGM01:0 bits are set to fast PWM
Compare Match is ignored, but the set or clear is done at BOTTOM. See
on page 99
COM0A1
Compare Output Mode, non-PWM Mode
Compare Output Mode, Fast PWM Mode
R/W
7
0
COM0A0
COM0A0
0
1
0
1
0
1
0
1
Table 15-2
for more details.
COM0A0
R/W
6
0
Description
Normal port operation, OC0A disconnected.
Toggle OC0A on Compare Match
Clear OC0A on Compare Match
Set OC0A on Compare Match
Description
Normal port operation, OC0A disconnected.
WGM02 = 0: Normal Port Operation, OC0A Disconnected.
WGM02 = 1: Toggle OC0A on Compare Match.
Clear OC0A on Compare Match, set OC0A at BOTTOM,
(non-inverting mode).
Set OC0A on Compare Match, clear OC0A at BOTTOM,
(inverting mode).
COM0B1
shows the COM0A1:0 bit functionality when the WGM02:0
R/W
5
0
COM0B0
R/W
4
0
R
3
–
0
(1)
R
2
0
–
WGM01
R/W
1
0
“Fast PWM Mode”
WGM00
R/W
0
0
9223B–AVR–09/11
TCCR0A