ATmega88PA Automotive Atmel Corporation, ATmega88PA Automotive Datasheet - Page 179

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ATmega88PA Automotive

Manufacturer Part Number
ATmega88PA Automotive
Description
Manufacturer
Atmel Corporation
20.3.2
20.3.3
9223B–AVR–09/11
Double Speed Operation (U2Xn)
External Clock
Table 20-1
lating the UBRRn value for each mode of operation using an internally generated clock
source.
Table 20-1.
Some examples of UBRRn values for some system clock frequencies are found in
(see
The transfer rate can be doubled by setting the U2Xn bit in UCSRnA. Setting this bit only has
effect for the asynchronous operation. Set this bit to zero when using synchronous operation.
Setting this bit will reduce the divisor of the baud rate divider from 16 to 8, effectively doubling
the transfer rate for asynchronous communication. Note however that the Receiver will in this
case only use half the number of samples (reduced from 16 to 8) for data sampling and clock
recovery, and therefore a more accurate baud rate setting and system clock are required
when this mode is used. For the Transmitter, there are no downsides.
External clocking is used by the synchronous slave modes of operation. The description in this
section refers to
External clock input from the XCKn pin is sampled by a synchronization register to minimize
the chance of meta-stability. The output from the synchronization register must then pass
through an edge detector before it can be used by the Transmitter and Receiver. This process
introduces a two CPU clock period delay and therefore the maximum external XCKn clock fre-
quency is limited by the following equation:
Note that f
to add some margin to avoid possible loss of data due to frequency variations.
f
Operating Mode
Asynchronous Normal mode
(U2Xn = 0)
Asynchronous Double Speed
mode (U2Xn = 1)
Synchronous Master mode
Note:
XCK
Atmel ATmega48PA/88PA/168PA [Preliminary]
page
f
----------- -
OSC
1. The baud rate is defined to be the transfer rate in bit per second (bps)
4
osc
194).
contains equations for calculating the baud rate (in bits per second) and for calcu-
BAUD
f
UBRRn
OSC
depends on the stability of the system clock source. It is therefore recommended
Equations for Calculating Baud Rate Register Setting
Figure 20-2
Baud rate (in bits per second, bps)
System Oscillator clock frequency
Contents of the UBRRnH and UBRRnL Registers, (0-4095)
for details.
Equation for Calculating Baud
BAUD
BAUD
BAUD
=
=
=
Rate
-----------------------------------------
16 UBRRn
------------------------------------- -
8 UBRRn
------------------------------------- -
2 UBRRn
(1)
f
f
f
OSC
OSC
OSC
+
+
+
1
1
1
UBRRn
Equation for Calculating
UBRRn
UBRRn
UBRRn Value
=
=
=
---------------------- - 1
16BAUD
------------------- - 1
8BAUD
------------------- - 1
2BAUD
f
f
f
OSC
OSC
OSC
Table 20-4
179

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