ATmega88PA Automotive Atmel Corporation, ATmega88PA Automotive Datasheet - Page 168
ATmega88PA Automotive
Manufacturer Part Number
ATmega88PA Automotive
Description
Manufacturer
Atmel Corporation
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168
Atmel ATmega48PA/88PA/168PA [Preliminary]
In SPI Slave mode, the control logic will sample the incoming signal of the SCK pin. To ensure
correct sampling of the clock signal, the minimum low and high periods should be:
Low periods: Longer than 2 CPU clock cycles.
High periods: Longer than 2 CPU clock cycles.
When the SPI is enabled, the data direction of the MOSI, MISO, SCK, and SS pins is overrid-
den according to
to
Table 19-1.
The following code examples show how to initialize the SPI as a Master and how to perform a
simple transmission. DDR_SPI in the examples must be replaced by the actual Data Direction
Register controlling the SPI pins. DD_MOSI, DD_MISO and DD_SCK must be replaced by the
actual data direction bits for these pins. E.g. if MOSI is placed on pin PB5, replace DD_MOSI
with DDB5 and DDR_SPI with DDRB.
Note:
“Alternate Port Functions” on page
MOSI
MISO
SCK
Pin
SS
1. See
the direction of the user defined SPI pins.
SPI Pin Overrides
Direction, Master SPI
User Defined
Input
User Defined
User Defined
“Alternate Functions of Port B” on page 81
Table 19-1 on page
(1)
79.
168. For more details on automatic port overrides, refer
for a detailed description of how to define
Direction, Slave SPI
User Defined
Input
Input
Input
9223B–AVR–09/11
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