ATmega88PA Automotive Atmel Corporation, ATmega88PA Automotive Datasheet - Page 309

• Manufacturer Part Number: ATmega88PA Automotive
• Manufacturer: Atmel Corporation

28.8
9223B–AVR–09/11
Serial Downloading
Both the Flash and EEPROM memory arrays can be programmed using the serial SPI bus
while RESET is pulled to GND. The serial interface consists of pins SCK, MOSI (input) and
MISO (output). After RESET is set low, the Programming Enable instruction needs to be exe-
cuted first before program/erase operations can be executed. NOTE, in
310, the pin mapping for SPI programming is listed. Not all parts use the SPI pins dedicated
for the internal SPI interface.
Figure 28-7. Serial Programming and Verify
Notes:
When programming the EEPROM, an auto-erase cycle is built into the self-timed program-
ming operation (in the Serial mode ONLY) and there is no need to first execute the Chip Erase
instruction. The Chip Erase operation turns the content of every memory location in both the
Program and EEPROM arrays into 0xFF.
Depending on CKSEL Fuses, a valid clock must be present. The minimum low and high peri-
ods for the serial clock (SCK) input are defined as follows:
Low: > 2 CPU clock cycles for f
High: > 2 CPU clock cycles for f
Atmel ATmega48PA/88PA/168PA [Preliminary]
1. If the device is clocked by the internal Oscillator, it is no need to connect a clock source to
2. V
the XTAL1 pin.
CC
- 0.3V <
MOSI
MISO
AV
SCK
CC
< V
ck
ck
CC
< 12MHz, 3 CPU clock cycles for f
< 12MHz, 3 CPU clock cycles for f
+ 0.3V, however,
RESET
XTAL1
GND
(1)
AV
CC
AVCC
VCC
should always be within 1.8 - 5.5V
+1.8 - 5.5V
+1.8 - 5.5V
ck
ck
>= 12MHz
>= 12MHz
(2)
Table 28-17 on page
309