ATmega88PA Automotive Atmel Corporation, ATmega88PA Automotive Datasheet - Page 203

• Manufacturer Part Number: ATmega88PA Automotive
• Manufacturer: Atmel Corporation

21.4
9223B–AVR–09/11
SPI Data Modes and Timing
Table 21-1.
There are four combinations of XCKn (SCK) phase and polarity with respect to serial data,
which are determined by control bits UCPHAn and UCPOLn. The data transfer timing dia-
grams are shown in
the XCKn signal, ensuring sufficient time for data signals to stabilize. The UCPOLn and
UCPHAn functionality is summarized in
these bits will corrupt all ongoing communication for both the Receiver and Transmitter.
Table 21-2.
Figure 21-1. UCPHAn and UCPOLn data transfer timing diagrams
Operating Mode
Synchronous Master
mode
Note:
UCPOLn
Atmel ATmega48PA/88PA/168PA [Preliminary]
BAUD
f
UBRRn
OSC
0
0
1
1
XCK
Data setup (TXD)
Data sample (RXD)
Data setup (TXD)
Data sample (RXD)
XCK
1. The baud rate is defined to be the transfer rate in bit per second (bps)
Equations for Calculating Baud Rate Register Setting
UCPOLn and UCPHAn Functionality-
UCPHAn
Figure
Baud rate (in bits per second, bps)
System Oscillator clock frequency
Contents of the UBRRnH and UBRRnL Registers, (0-4095)
0
1
0
1
UCPOL=0
Equation for Calculating Baud
21-1. Data bits are shifted out and latched in on opposite edges of
BAUD
SPI Mode
=
0
1
2
3
Rate
-------------------------------------- -
2 UBRRn
Table
(1)
f
OSC
Leading Edge
Sample (Rising)
Setup (Rising)
Sample (Falling)
Setup (Falling)
21-2. Note that changing the setting of any of
+
1
Data setup (TXD)
Data sample (RXD)
Data setup (TXD)
Data sample (RXD)
XCK
XCK
Equation for Calculating UBRRn
UBRRn
Trailing Edge
Setup (Falling)
Sample (Falling)
Setup (Rising)
Sample (Rising)
UCPOL=1
Value
=
------------------- - 1
2BAUD
f
OSC
–
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