ATmega88PA Automotive Atmel Corporation, ATmega88PA Automotive Datasheet - Page 71
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ATmega88PA Automotive
Manufacturer Part Number
ATmega88PA Automotive
Description
Manufacturer
Atmel Corporation
- Current page: 71 of 371
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13.2.4
13.2.5
9223B–AVR–09/11
PCICR – Pin Change Interrupt Control Register
PCIFR – Pin Change Interrupt Flag Register
• Bit 7:3 – Reserved
These bits are unused bits in the Atmel
zero.
• Bit 2 – PCIE2: Pin Change Interrupt Enable 2
When the PCIE2 bit is set (one) and the I-bit in the Status Register (SREG) is set (one), pin
change interrupt 2 is enabled. Any change on any enabled PCINT[23:16] pin will cause an
interrupt. The corresponding interrupt of Pin Change Interrupt Request is executed from the
PCI2 Interrupt Vector. PCINT[23:16] pins are enabled individually by the PCMSK2 Register.
• Bit 1 – PCIE1: Pin Change Interrupt Enable 1
When the PCIE1 bit is set (one) and the I-bit in the Status Register (SREG) is set (one), pin
change interrupt 1 is enabled. Any change on any enabled PCINT[14:8] pin will cause an inter-
rupt. The corresponding interrupt of Pin Change Interrupt Request is executed from the PCI1
Interrupt Vector. PCINT[14:8] pins are enabled individually by the PCMSK1 Register.
• Bit 0 – PCIE0: Pin Change Interrupt Enable 0
When the PCIE0 bit is set (one) and the I-bit in the Status Register (SREG) is set (one), pin
change interrupt 0 is enabled. Any change on any enabled PCINT[7:0] pin will cause an inter-
rupt. The corresponding interrupt of Pin Change Interrupt Request is executed from the PCI0
Interrupt Vector. PCINT[7:0] pins are enabled individually by the PCMSK0 Register.
• Bit 7:3 – Reserved
These bits are unused bits in the Atmel ATmega48PA/88PA/168PA, and will always read as
zero.
• Bit 2 – PCIF2: Pin Change Interrupt Flag 2
When a logic change on any PCINT[23:16] pin triggers an interrupt request, PCIF2 becomes
set (one). If the I-bit in SREG and the PCIE2 bit in PCICR are set (one), the MCU will jump to
the corresponding Interrupt Vector. The flag is cleared when the interrupt routine is executed.
Alternatively, the flag can be cleared by writing a logical one to it.
• Bit 1 – PCIF1: Pin Change Interrupt Flag 1
When a logic change on any PCINT[14:8] pin triggers an interrupt request, PCIF1 becomes
set (one). If the I-bit in SREG and the PCIE1 bit in PCICR are set (one), the MCU will jump to
the corresponding Interrupt Vector. The flag is cleared when the interrupt routine is executed.
Alternatively, the flag can be cleared by writing a logical one to it.
Bit
(0x68)
Read/Write
Initial Value
Bit
0x1B (0x3B)
Read/Write
Initial Value
Atmel ATmega48PA/88PA/168PA [Preliminary]
R
R
7
–
0
7
–
0
R
R
6
–
0
6
–
0
R
R
5
–
0
5
–
0
®
ATmega48PA/88PA/168PA, and will always read as
R
R
4
–
0
4
–
0
R
R
3
–
0
3
–
0
PCIE2
PCIF2
R/W
R/W
2
0
2
0
PCIE1
PCIF1
R/W
R/W
1
0
1
0
PCIE0
PCIF0
R/W
R/W
0
0
0
0
PCICR
PCIFR
71
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