ATmega88PA Automotive Atmel Corporation, ATmega88PA Automotive Datasheet - Page 272

• Manufacturer Part Number: ATmega88PA Automotive
• Manufacturer: Atmel Corporation

26.2.3
272
Atmel ATmega48PA/88PA/168PA [Preliminary]
Preventing Flash Corruption
The algorithm for reading the Fuse Low byte is similar to the one described above for reading
the Lock bits. To read the Fuse Low byte, load the Z-pointer with 0x0000 and set the BLBSET
and SELFPRGEN bits in SPMCSR. When an LPM instruction is executed within three cycles
after the BLBSET and SELFPRGEN bits are set in the SPMCSR, the value of the Fuse Low
byte (FLB) will be loaded in the destination register as shown below.See
296
Similarly, when reading the Fuse High byte (FHB), load 0x0003 in the Z-pointer. When an
LPM instruction is executed within three cycles after the BLBSET and SELFPRGEN bits are
set in the SPMCSR, the value of the Fuse High byte will be loaded in the destination register
as shown below. See
Extended Fuse byte.
Similarly, when reading the Extended Fuse byte (EFB), load 0x0002 in the Z-pointer. When an
LPM instruction is executed within three cycles after the BLBSET and SELFPRGEN bits are
set in the SPMCSR, the value of the Extended Fuse byte will be loaded in the destination reg-
ister as shown below. See
Extended Fuse byte.
Fuse and Lock bits that are programmed, will be read as zero. Fuse and Lock bits that are
unprogrammed, will be read as one.
During periods of low V
too low for the CPU and the Flash to operate properly. These issues are the same as for board
level systems using the Flash, and the same design solutions should be applied.
A Flash program corruption can be caused by two situations when the voltage is too low. First,
a regular write sequence to the Flash requires a minimum voltage to operate correctly. Sec-
ondly, the CPU itself can execute instructions incorrectly, if the supply voltage for executing
instructions is too low.
Flash corruption can easily be avoided by following these design recommendations (one is
sufficient):
Bit
Rd
Bit
Rd
Bit
Rd
1. Keep the AVR RESET active (low) during periods of insufficient power supply voltage.
2. Keep the AVR core in Power-down sleep mode during periods of low V
for a detailed description and mapping of the Fuse Low byte.
This can be done by enabling the internal Brown-out Detector (BOD) if the operating
voltage matches the detection level. If not, an external low V
can be used. If a reset occurs while a write operation is in progress, the write opera-
tion will be completed provided that the power supply voltage is sufficient.
prevent the CPU from attempting to decode and execute instructions, effectively pro-
tecting the SPMCSR Register and thus the Flash from unintentional writes.
FLB7
FHB7
FHB7
7
7
7
Table 28-5 on page 296
CC
FLB6
FHB6
FHB6
, the Flash program can be corrupted because the supply voltage is
6
6
6
Table 28-5 on page 296
FHB5
FHB5
FLB5
5
5
5
FHB4
FHB4
FLB4
4
4
4
for detailed description and mapping of the
for detailed description and mapping of the
FHB3
FHB3
FLB3
3
3
3
FHB2
FHB2
FLB2
2
2
2
CC
reset protection circuit
FHB1
FHB1
FLB1
1
1
1
Table 28-5 on page
CC
FHB0
FHB0
. This will
FLB0
9223B–AVR–09/11
0
0
0