ATmega88PA Automotive Atmel Corporation, ATmega88PA Automotive Datasheet - Page 362

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ATmega88PA Automotive

Manufacturer Part Number
ATmega88PA Automotive
Description
Manufacturer
Atmel Corporation
31. Register Summary (Continued)
362
Notes:
0x1E (0x3E)
0x1D (0x3D)
0x1C (0x3C)
0x1B (0x3B)
0x1A (0x3A)
0x0E (0x2E)
0x0D (0x2D)
0x0C (0x2C)
0x0B (0x2B)
0x0A (0x2A)
Address
0x1F (0x3F)
0x0F (0x2F)
0x28 (0x48)
0x27 (0x47)
0x26 (0x46)
0x25 (0x45)
0x24 (0x44)
0x23 (0x43)
0x22 (0x42)
0x21 (0x41)
0x20 (0x40)
0x19 (0x39)
0x18 (0x38)
0x17 (0x37)
0x16 (0x36)
0x15 (0x35)
0x14 (0x34)
0x13 (0x33)
0x12 (0x32)
0x11 (0x31)
0x10 (0x30)
0x09 (0x29)
0x08 (0x28)
0x07 (0x27)
0x06 (0x26)
0x05 (0x25)
0x04 (0x24)
0x03 (0x23)
0x02 (0x22)
0x01 (0x21)
0x0 (0x20)
1. For compatibility with future devices, reserved bits should be written to zero if accessed. Reserved I/O memory addresses
2. I/O Registers within the address range 0x00 - 0x1F are directly bit-accessible using the SBI and CBI instructions. In these
3. Some of the Status Flags are cleared by writing a logical one to them. Note that, unlike most other AVRs, the CBI and SBI
4. When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O
5. Only valid for the Atmel ATmega88A/88PA/168A/168PA/328/328P.
6. BODS and BODSE only available for picoPower devices ATmega48PA/88PA/168PA
Atmel ATmega48PA/88PA/168PA [Preliminary]
should never be written.
registers, the value of single bits can be checked by using the SBIS and SBIC instructions.
instructions will only operate on the specified bit, and can therefore be used on registers containing such Status Flags.
The CBI and SBI instructions work with registers 0x00 to 0x1F only.
Registers as data space using LD and ST instructions, 0x20 must be added to these addresses. The Atmel
ATmega48PA/88PA/168PA is a complex microcontroller with more peripheral units than can be supported within the 64
location reserved in Opcode for the IN and OUT instructions. For the Extended I/O space from 0x60 - 0xFF in SRAM, only
the ST/STS/STD and LD/LDS/LDD instructions can be used.
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
TCCR0B
TCCR0A
GPIOR0
Name
GTCCR
PORTD
PORTC
OCR0B
OCR0A
EEARH
PORTB
TCNT0
EEARL
EIMSK
PCIFR
EEDR
EECR
TIFR2
TIFR1
TIFR0
DDRD
DDRC
DDRB
PIND
PINC
PINB
EIFR
COM0A1
PORTD7
PORTB7
FOC0A
Bit 7
PIND7
PINB7
DDD7
DDB7
TSM
COM0A0
PORTD6
PORTC6
PORTB6
FOC0B
Bit 6
PIND6
PINC6
PINB6
DDD6
DDC6
DDB6
COM0B1
PORTD5
PORTC5
PORTB5
EEPM1
PIND5
PINC5
Bit 5
PINB5
DDD5
DDC5
DDB5
ICF1
Timer/Counter0 Output Compare Register B
Timer/Counter0 Output Compare Register A
(EEPROM Address Register High Byte)
EEPROM Address Register Low Byte
General Purpose I/O Register 0
COM0B0
PORTD4
PORTC4
PORTB4
EEPM0
Bit 4
PIND4
PINC4
PINB4
DDD4
DDC4
DDB4
EEPROM Data Register
Timer/Counter0 (8-bit)
PORTD3
PORTC3
PORTB3
WGM02
EERIE
Bit 3
PIND3
PINC3
PINB3
DDD3
DDC3
DDB3
5.
PORTD2
PORTC2
PORTB2
EEMPE
OCF2B
OCF1B
OCF0B
PIND2
PINC2
Bit 2
PCIF2
PINB2
DDD2
DDC2
DDB2
CS02
PSRASY
PORTD1
PORTC1
PORTB1
WGM01
OCF2A
OCF1A
OCF0A
PIND1
PINC1
Bit 1
INTF1
PCIF1
PINB1
EEPE
DDD1
DDC1
DDB1
CS01
INT1
PSRSYNC
PORTD0
PORTC0
PORTB0
WGM00
PINC0
Bit 0
INTF0
PCIF0
PIND0
PINB0
EERE
TOV2
TOV1
TOV0
DDD0
DDC0
DDB0
CS00
INT0
9223B–AVR–09/11
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