AD9789 Analog Devices, AD9789 Datasheet - Page 28

• Manufacturer Part Number: AD9789
• Description: 14-Bit, 2400 MSPS RF DAC with 4-Channel Signal Processing
• Manufacturer: Analog Devices

Specifications of AD9789

• Resolution (bits): 14bit
• Dac Update Rate: 2.4GSPS
• Dac Settling Time: 13ns
• Max Pos Supply (v): +3.47V
• Single-supply: No
• Dac Type: Current Out
• Dac Input Format: LVDS,Par

AD9789
Addr
0x2F
0x30
0x31
0x32
0x33
0x34
0x35
0x36
0x37
0x38
0x39
0x3A
0x3B
0x3C
0x3D
0x3E
0x3F
0x40
0x41
0x42
0x43
0x44
0x45
0x46
0x47
0x48
0x49
0x4A
0x4B
0x4C
0x4D
0x50
0x51
0x52
0x53
0x54
0x55
Register Name
Mu Delay
Control 1
Mu control duty
cycle
Clock Receiver 1
Clock Receiver 2
Mu Delay
Control 2
Reserved
Reserved
DAC bias
Reserved
DAC decoder
Mu Delay
Control 3
Mu Delay
Control 4
Reserved
Full-Scale
Current 1
Full-Scale
Current 2
Phase detector
control
Reserved
BIST control
BIST status
BIST zero
padding length
BIST vector
length
BIST clock adjust
Sign 0 control
Sign 0 clock
adjust
Sign 1 control
Sign 1 clock
adjust
RegFnl0Freq
RegFnl1Freq
BIST Signature 0
BIST Signature 1
Bit 7
SEARCH_
TOL
Duty cycle
correct
enable
CLK_DIS
MU_CLKDIS
PDBIAS
MUDLY[0]
PHZ_PD
CLKSHDN
BDONE
S0ENABL
S1ENABL
Bit 6
SEARCH_ERR
INC_DEC
(Factory)
Reserved
SLOPE
Reserved
INPUTSEL
S0RDEN
S1RDEN
SEARCH_DIR[1:0]
CLKN_CML[3:0]
S0CLKDIV[3:0]
S1CLKDIV[3:0]
BCLKDIV[3:0]
Bit 5
TRACK_
ERR
PSIGN
CMP_BST
Reserved
S0PRNG
S1PRNG
Rev. A | Page 28 of 76
Reserved
Reserved
Final Rate/
Final Rate/
MODE[1:0]
Reserved
Bit 4
AUTO_CAL
BENABLE
S0ZERO
S1ZERO
VECTLEN[23:16]
VECTLEN[15:8]
PADLEN[15:8]
VECTLEN[7:0]
PADLEN[7:0]
SGN0[23:16]
SGN1[23:16]
MUDLY[8:1]
SGN0[15:8]
SGN1[15:8]
Offset
Offset
SGN0[7:0]
SGN1[7:0]
Reserved
Reserved
Reserved
Reserved
Reserved
FSC[7:0]
BSTATUS[6:0]
Control 0 [7:0]
Control 1 [7:0]
S0NEG
Bit 3
MUSAMP
S1NEG
MANUAL_ADJ[5:0]
(Factory test only)
CLKP_CML[3:0]
GUARDBAND[4:0]
MUPHZ[4:0]
Bit 2
S0FNLCH
S1FNLCH
PHZ_DET_BIAS[3:0]
S0CLKPHZ[3:0]
S1CLKPHZ[3:0]
BCLKPHZ[3:0]
BMODE[3:0]
Reserved
GAIN[1:0]
Bit 1
DAC decoder mode
S0SEL[1:0]
S1SEL[1:0]
MSEL[1:0]
FSC[9:8]
Bit 0
NSIGN
MU_EN
De-
fault
0x0B
0x40
0xF0
0x3F
0x42
0x00
0xCA
0x03
0x00
0x00
0x40
0x00
0x00
0x00
0x02
0x18
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00