AD9789 Analog Devices, AD9789 Datasheet - Page 30

• Manufacturer Part Number: AD9789
• Description: 14-Bit, 2400 MSPS RF DAC with 4-Channel Signal Processing
• Manufacturer: Analog Devices

Specifications of AD9789

• Resolution (bits): 14bit
• Dac Update Rate: 2.4GSPS
• Dac Settling Time: 13ns
• Max Pos Supply (v): +3.47V
• Single-supply: No
• Dac Type: Current Out
• Dac Input Format: LVDS,Par

AD9789
Table 16. Interrupt Status/Clear Register (Address 0x04)
Bit
7
6
5
4
3
2
1
0
Table 17. Channel Enable Register (Address 0x05)
Bit
[7:4]
[3:0]
Table 18. Bypass Register (Address 0x06)
Bit
7
6
5
[4:0]
Name
PARERR
BISTDONE
PARMSET
PARMCLR
LOCKACQ
LOCKLOST
SATERR
Reserved
Bit Name
Reserved
CHANEN[3:0]
Bit Name
QAM
SRRC
Reserved
INT[4:0]
If this bit is set to 1, one or more parity errors has occurred. Writing a 1 to this bit clears the interrupt.
If this bit is set to 1, the BIST has reached the terminal state. Writing a 1 to this bit clears the interrupt.
If this bit is set to 1, the parameter update register (Address 0x24) has been updated. Writing a 1 to this bit clears
the interrupt.
If this bit is set to 1, the parameter update register (Address 0x24) has been cleared. Writing a 1 to this bit clears
the interrupt.
If this bit is set to 1, proper data handoff between the digital engine and the DAC core is occurring.
If this bit is set to 1, proper data handoff between the digital engine and the DAC core has been lost. Writing a 1
to this bit clears the interrupt.
If this bit is set to 1, one or more saturation errors (overflow into 16× interpolator) has occurred. Writing a 1 to
this bit clears the interrupt.
Reserved.
Description
Description
Reserved.
A Logic 1 in any bit position enables the corresponding channel; 0000 means that all channels are disabled.
Setting
0000
0001
0010
0011
…
1110
1111
Description
If this bit is set to 1, the QAM mappers are bypassed.
If this bit is set to 1, the square root raised cosine (SRRC) filters are bypassed.
Reserved.
A Logic 1 in any bit position bypasses the corresponding interpolation filter. The preferred order for bypassing
interpolation filters is to first bypass Filter 0, then Filter 1, and so on.
Setting
00000
00001
00010
00011
…
01111
…
11111
Channels Enabled
All channels disabled.
Channel 0 enabled.
Channel 1 enabled.
Channel 0 and Channel 1 enabled.
…
Channel 1, Channel 2, and Channel 3 enabled.
All channels enabled.
Interpolation Filters Bypassed
All interpolation filters enabled.
Interpolation Filter 0 bypassed.
Interpolation Filter 1 bypassed.
Interpolation Filter 0 and Interpolation Filter 1 bypassed.
…
Interpolation Filter 0, Interpolation Filter 1, Interpolation Filter 2, and Interpolation Filter 3
bypassed.
…
All interpolation filters bypassed.
Rev. A | Page 30 of 76