AD9789 Analog Devices, AD9789 Datasheet - Page 62

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AD9789

Manufacturer Part Number
AD9789
Description
14-Bit, 2400 MSPS RF DAC with 4-Channel Signal Processing
Manufacturer
Analog Devices
Datasheet

Specifications of AD9789

Resolution (bits)
14bit
Dac Update Rate
2.4GSPS
Dac Settling Time
13ns
Max Pos Supply (v)
+3.47V
Single-supply
No
Dac Type
Current Out
Dac Input Format
LVDS,Par

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AD9789
RECOMMENDED START-UP SEQUENCE
The steps necessary to optimize the performance of the part and generate an output waveform are listed in Table 79.
Table 79. Recommended System Start-Up Sequence
Step
0
0
1
1
2
3
4
4
4
4
5
6
7
8
9
9
9
9
9
9
9
10
11
12
13
14
15
1
Typical lock time of the mu controller is approximately 180,000 DAC cycles (at 2 GSPS, ~75 μs).
Description
Power up the AD9789.
Apply the clock.
Enable the clock receiver and set the clock CML.
Enable duty cycle correction.
Enable digital clocks.
Set up mu controller.
Disable all interrupts.
Clear all interrupts.
Enable mu control interrupts.
Enable mu delay controller.
Set up digital datapath.
Set up rate converter.
Set up BPF center frequency.
Set up interface.
Set up channel gains.
Set up spectral invert.
Set up full-scale current.
Wait until mu delay controller is locked (SPI read)
Update rate converter and BPF.
Update interface clocks.
Enable channels.
Enable other interrupts if desired.
Rev. A | Page 62 of 76
1
.
Register
0x32
0x30
0x24
0x24
0x2F
0x33
0x39
0x3A
0x03
0x04
0x03
0x33
0x06 to 0x15
0x16 to 0x1B
0x1C to 0x1D
0x20 to 0x23
0x25 to 0x28
0x29
0x3C to 0x3D
0x04
0x1E
0x24
0x24
0x05
0x03
Data
0x9E
0x80
0x00
0x80
0xCE
0x42
0x4E
0x6C
0x00
0xFE
0x0C
0x43
0x08
0x80
0x00
0x80

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