AD9789 Analog Devices, AD9789 Datasheet - Page 59

no-image

AD9789

Manufacturer Part Number
AD9789
Description
14-Bit, 2400 MSPS RF DAC with 4-Channel Signal Processing
Manufacturer
Analog Devices
Datasheet

Specifications of AD9789

Resolution (bits)
14bit
Dac Update Rate
2.4GSPS
Dac Settling Time
13ns
Max Pos Supply (v)
+3.47V
Single-supply
No
Dac Type
Current Out
Dac Input Format
LVDS,Par

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD9789BBC
Quantity:
305
Part Number:
AD9789BBCZ
Manufacturer:
ALTERA
Quantity:
449
Part Number:
AD9789BBCZ
Manufacturer:
ST
0
Part Number:
AD9789BBCZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Operating the Mu Controller in Auto Mode
The mu controller is enabled via Register 0x33[0]. Enabling the
controller sets in motion the phase search mode. Before enabling
the controller, it is important to turn on both the phase comparator
boost (Register 0x3E[5]) and the mu control duty cycle correction
circuitry (Register 0x30[7]). Both of these functions allow for more
robust operation of the mu controller over the entire operating
speed of the part. The three modes of operation for the mu con-
troller are specified by the MODE[1:0] bits in Register 0x33[5:4]
as follows:
The search algorithm begins at a specified mu delay value set using
the MUDLY[8:0] bits, where the LSB is located in Register 0x39[7]
and the MSBs are located in Register 0x3A[7:0]. Even though
there are nine bits of resolution for this delay line value, the
maximum allowable mu delay is 431 (decimal). The optimal
point to begin the search is in the middle of the delay line, or
approximately 216. The initial search algorithm works by sweep-
ing through different mu delay values until the desired phase is
measured; this phase is specified using the MUPHZ[4:0] bits in
Register 0x39[4:0], with the maximum allowable phase being 16.
If values larger than 16 are loaded, the controller will not lock.
When the desired phase is measured, the slope of the phase
measurement is calculated and compared to the desired slope,
which is specified by the SLOPE bit in Register 0x33[6]. For
optimal ac performance, the best setting for the search is a
positive slope and a phase value of 14. If the phase and slope
match the configured values, the search algorithm is finished.
The SEARCH_TOL bit (Register 0x2F[7]) can be used to
specify the accuracy of the search as follows:
Figure 118 shows a typical plot of mu phase vs. mu delay line
value at 2.4 GSPS. Starting at the selected mu delay value, the
search direction can be specified via the SEARCH_DIR[1:0]
bits in Register 0x39[6:5]. The three possible choices for the
search are as follows:
If the search direction is alternating, the search proceeds in both
directions until a programmable guard band is reached in one
of the directions, specified by the GUARDBAND[4:0] bits in
Register 0x2F[4:0]. When the guard band is reached, the search
continues only in the opposite direction. If the desired phase is
not found before the guard band is reached in the second direc-
tion, the search reverts to the alternating mode and continues
looking within the guard band.
Search and track (00) (optimal setting)
Track only (01)
Search only (10)
Not exact (0): can find a phase within two values of the
desired phase
Exact (1): finds the exact phase specified (optimal setting)
Down only (00)
Up only (01)
Alternating up and down (10) (optimal setting)
Rev. A | Page 59 of 76
The search fails if the mu delay reaches the endpoints. If the
controller does not find the desired phase during the search, the
TRACK_ERR bit (Register 0x2F[5]) determines the corrective
action as follows:
To determine whether the search is on the correct slope, the
controller measures the slope by first incrementing and then
decrementing the mu delay value until any of the following
events happens:
After incrementing and then decrementing the mu delay value,
the values of the measured phases are compared to determine
whether the slope matches the desired slope. To consider the
slope valid, the positive direction phase and the negative
direction phase must be on opposite sides of the desired phase.
Examples of valid and invalid phase choices are shown in
Figure 119 and Figure 120.
POSITIVE SLOPE
Continue (0): continues to search (optimal setting)
Reset (1)
The phase changes by 2.
The phase is equal to 16 (the maximum value).
The phase is equal to 0 (the minimum value).
The mu delay is 431 (the maximum value).
The mu delay is 0 (the minimum value).
10
Figure 119. Valid Positive and Negative Slope Phase Examples
18
16
14
12
10
11
8
6
4
2
0
Figure 118. Typical Mu Phase Characteristics @ 2.4 GSPS
0
12
GUARD
BAND
40
13
DESIRED
14
80
SEARCH STARTING
120
LOCATION
15
160
MU DELAY
200
DESIRED
PHASE
SLOPE
AND
240
280
320
DESIRED
9
360
NEGATIVE SLOPE
8
GUARD
BAND
400
7
AD9789
6
5
4
440

Related parts for AD9789