AD9789 Analog Devices, AD9789 Datasheet - Page 69

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AD9789

Manufacturer Part Number
AD9789
Description
14-Bit, 2400 MSPS RF DAC with 4-Channel Signal Processing
Manufacturer
Analog Devices
Datasheet

Specifications of AD9789

Resolution (bits)
14bit
Dac Update Rate
2.4GSPS
Dac Settling Time
13ns
Max Pos Supply (v)
+3.47V
Single-supply
No
Dac Type
Current Out
Dac Input Format
LVDS,Par

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In Table 96, “R” represents real data loaded to a given channel, “I” represents the in-phase term, and “Q” represents the quadrature term
of complex data. The channel number follows R, I, or Q.
Table 96. Channelizer Mode Configurations and Channel Construction: CMOS Interface, Channel Prioritization = 1
Datapath Configuration
BW
4
Datapath Configuration
BW
4
Datapath Configuration
BW
8
Datapath Configuration
BW
8
DW
8
DW
8
DW
8
DW
8
Format
Real
Format
Complex
Format
Real
Format
Complex
DCO
1
2
3
4
5
6
7
8
DCO
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
DCO
1
2
3
4
DCO
1
2
3
4
5
6
7
8
[D31:D28]
[D31:D28]
[D31:D28]
[D31:D28]
[D27:D24]
[D27:D24]
[D27:D24]
[D27:D24]
Rev. A | Page 69 of 76
[D23:D20]
[D23:D20]
[D23:D20]
[D23:D20]
CMOS Pin Mapping
CMOS Pin Mapping
CMOS Pin Mapping
CMOS Pin Mapping
[D19:D16]
[D19:D16]
[D19:D16]
[D19:D16]
[D15:D12]
[D15:D12]
[D15:D12]
[D15:D12]
[D11:D8]
[D11:D8]
[D11:D8]
[D11:D8]
[D7:D4]
[D7:D4]
[D7:D4]
[D7:D4]
AD9789
Q0
Q1
Q2
Q3
R0
R1
R2
R3
I0
I1
I2
I3
[D3:D0]
R0
R0
R1
R1
R2
R2
R3
R3
[D3:D0]
I0
I0
Q0
Q0
I1
I1
Q1
Q1
I2
I2
Q2
Q2
I3
I3
Q3
Q3
[D3:D0]
[D3:D0]

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