p2125vps20 Renesas Electronics Corporation., p2125vps20 Datasheet - Page 183

• Manufacturer Part Number: p2125vps20
• Description: 16-bit Single-chip Microcomputer H8s Family / H8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

7.7
7.7.1
An example is shown in which the DTC is used to receive 128 bytes of data via the SCI.
1. Set MRA to a fixed source address (SM1 = SM0 = 0), incrementing destination address (DM1
2. Set the start address of the register information at the DTC vector address.
3. Set the corresponding bit in DTCER to 1.
4. Set the SCI to the appropriate receive mode. Set the RIE bit in SCR to 1 to enable the
5. Each time the reception of one byte of data has been completed on the SCI, the RDRF flag in
6. When CRA becomes 0 after 128 data transfers have been completed, the RDRF flag is held at
= 1, DM0 = 0), normal mode (MD1 = MD0 = 0), and byte size (Sz = 0). The DTS bit can have
any value. Set MRB for one data transfer by one interrupt (CHNE = 0, DISEL = 0). Set the
SCI, RDR address in SAR, the start address of the RAM area where the data will be received
in DAR, and 128 (H'0080) in CRA. CRB can be set to any value.
reception complete (RXI) interrupt. Since the generation of a receive error during the SCI
reception operation will disable subsequent reception, the CPU should be enabled to accept
receive error interrupts.
SSR is set to 1, an RXI interrupt is generated, and the DTC is activated. The receive data is
transferred from RDR to RAM by the DTC. DAR is incremented and CRA is decremented.
The RDRF flag is automatically cleared to 0.
1, the DTCE bit is cleared to 0, and an RXI interrupt request is sent to the CPU. The interrupt
handling routine will perform wrap-up processing.
Examples of Use of the DTC
Normal Mode
Rev. 1.00 Sep. 21, 2006 Page 145 of 658
Section 7 Data Transfer Controller (DTC)
REJ09B0310-0100