p2125vps20 Renesas Electronics Corporation., p2125vps20 Datasheet - Page 536

• Manufacturer Part Number: p2125vps20
• Description: 16-bit Single-chip Microcomputer H8s Family / H8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

Section 19 Flash Memory (0.18-µm F-ZTAT Version)
(3)
The procedures for download, initialization, and erasing are shown in figure 19.12.
The procedure program must be executed in an area other than the user MAT to be erased.
Especially the part where the SCO bit in FCCS is set to 1 for downloading must be executed in the
on-chip RAM.
The area that can be executed in the steps of the user procedure program (on-chip RAM and user
MAT) is shown in section 19.4.4, Storable Areas for Procedure Program and Program Data.
For the downloaded on-chip program area, see the RAM map for programming/erasing in figure
19.10.
Rev. 1.00 Sep. 21, 2006 Page 498 of 658
REJ09B0310-0100
Erasing Procedure in User Program Mode
JSR FTDAR setting + 32
Select on-chip program
to be downloaded and
destination by FTDAR
Start erasing procedure
specify download
Set SCO to 1 and
execute download
Set FKEY to H'A5
Set the FPEFEQ
Clear FKEY to 0
Initialization
FPFR = 0 ?
DPFR = 0?
parameter
program
1
Yes
Yes
Initialization error processing
Download error processing
No
No
(a)
Figure 19.12 Erasing Procedure
No
JSR FTDAR setting + 16
Set the FEBS parameter
Disable interrupts and
bus master operation
procedure program
Set FKEY to H'5A
Clear FKEY to 0
other than CPU
Required block
End erasing
FPFR = 0?
completed?
erasing is
Erasing
1
Yes
Yes
Erasing error processing
No
Clear FKEY
(b)
(c)
(d)
(e)
(f)