p2125vps20 Renesas Electronics Corporation., p2125vps20 Datasheet - Page 71

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p2125vps20

Manufacturer Part Number
p2125vps20
Description
16-bit Single-chip Microcomputer H8s Family / H8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
2.6
The H8S/2000 CPU has 65 types of instructions. The instructions are classified by function as
shown in table 2.1.
Table 2.1
Notes: B: Byte size; W: Word size; L: Longword size.
Function
Data transfer
Arithmetic
operations
Logic operations
Shift
Bit manipulation
Branch
System control
Block data transfer EEPMOV
1. POP.W Rn and PUSH.W Rn are identical to MOV.W @SP+, Rn and MOV.W Rn, @-
2. B
3. Cannot be used in this LSI.
4. To use the TAS instruction, use registers ER0, ER1, ER4, and ER5.
5. Since register ER7 functions as the stack pointer in an STM/LDM instruction, it cannot
Instruction Set
SP. POP.L ERn and PUSH.L ERn are identical to MOV.L @SP+, ERn and MOV.L ERn,
@-SP.
be used as an STM/LDM register.
CC
Instruction Classification
is the generic name for conditional branch instructions.
Instructions
MOV
POP*
LDM*
MOVFPE*
ADD, SUB, CMP, NEG
ADDX, SUBX, DAA, DAS
INC, DEC
ADDS, SUBS
MULXU, DIVXU, MULXS, DIVXS
EXTU, EXTS
TAS*
AND, OR, XOR, NOT
SHAL, SHAR, SHLL, SHLR, ROTL, ROTR, ROTXL,
ROTXR
BSET, BCLR, BNOT, BTST, BLD, BILD, BST, BIST, BAND,
BIAND, BOR, BIOR, BXOR, BIXOR
B
TRAPA, RTE, SLEEP, LDC, STC, ANDC, ORC, XORC,
NOP
CC
*
2
, JMP, BSR, JSR, RTS
4
1
5
, PUSH*
, STM*
3
, MOVTPE*
5
1
3
Rev. 1.00 Sep. 21, 2006 Page 33 of 658
Size
B/W/L
W/L
L
W/L
B
L
B
B/W/L
B
B/W/L
B/W
B/W/L
B/W/L
B
REJ09B0310-0100
Section 2 CPU
Total: 65
Types
8
1
5
19
4
14
5
9

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