p2125vps20 Renesas Electronics Corporation., p2125vps20 Datasheet - Page 249

• Manufacturer Part Number: p2125vps20
• Description: 16-bit Single-chip Microcomputer H8s Family / H8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

An example of the additional pulses when CFS = 1 (base cycle = resolution (T) × 256) and OS = 1
(inverted PWM output) is described below. When CFS = 1, the upper eight bits (DA13 to DA6) in
DADR determine the duty cycle of the base pulse while the subsequent six bits (DA5 to DA0)
determine the locations of the additional pulses as shown in figure 10.6.
Table 10.5 lists the locations of the additional pulses.
In this example, DADR = H'0207 (B'0000 0010 0000 0111). The output waveform is shown in
figure 10.7. Since CFS = 1 and the value of the upper eight bits is B'0000 0010, the high width of
the base pulse duty cycle is 2/256 × (T).
DA13 DA12 DA11 DA10 DA9
Figure 10.5 Output Waveform (OS = 1, DADR corresponds to T
t
t
t
H1
f1
H1
t
Figure 10.6 D/A Data Register Configuration when CFS = 1
t
t
Duty cycle of base pulse
H1
f1
H1
= t
+ t
= t
+ t
t
f1
t
f2
f1
H2
f2
H2
= t
= t
+ t
+ t
f3
f3
H3
= ··· = t
H3
= ··· = t
+ ··· + t
+ ··· + t
t
f255
H2
t
f63
H2
a. CFS = 0 [base cycle = resolution (T) × 64]
b. CFS = 1 [base cycle = resolution (T) × 256]
H255
DA8
H63
= t
= t
t
f2
t
f2
f64
f256
+ t
+ t
= T× 256
H64
H256
= T× 64
DA7
= T
= T
1 conversion cycle
1 conversion cycle
H
H
DA6
t
H3
t
H3
DA5
Location of additional pulses
DA4
t
H255
t
H63
Rev. 1.00 Sep. 21, 2006 Page 211 of 658
t
DA3
f255
t
Section 10 14-Bit PWM Timer (PWMX)
f63
DA2
t
H256
DA1
t
H64
t
f256
t
f64
DA0
REJ09B0310-0100
H
)
CFS
1
1