p2125vps20 Renesas Electronics Corporation., p2125vps20 Datasheet - Page 613

• Manufacturer Part Number: p2125vps20
• Description: 16-bit Single-chip Microcomputer H8s Family / H8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

Figure 22.2 shows an example of medium-speed mode timing.
22.4
The CPU makes a transition to sleep mode if the SLEEP instruction is executed when the SSBY
bit in SBYCR is cleared to 0 and the LSON bit in LPWRCR is cleared to 0. In sleep mode, CPU
operation stops but the on-chip peripheral modules do not. The contents of the CPU’s internal
registers are retained.
Sleep mode is cleared by any interrupt, the RES pin input, or the STBY pin input.
When an interrupt occurs, sleep mode is cleared and interrupt exception handling starts. Sleep
mode is not cleared if the interrupt is disabled, or interrupts other than NMI have been masked by
the CPU.
When the RES pin is driven low and sleep mode is cleared, a transition is made to the reset state.
After the specified reset input time has elapsed, driving the RES pin high causes the CPU to start
reset exception handling.
When the STBY pin is driven low, a transition is made to hardware standby mode.
peripheral module clock
Bus master clock
Internal address bus
φ ,
Internal write signal
Sleep Mode
Figure 22.2 Medium-Speed Mode Timing
SBYCR
Medium-speed mode
Rev. 1.00 Sep. 21, 2006 Page 575 of 658
Section 22 Power-Down Modes
SBYCR
REJ09B0310-0100