p2125vps20 Renesas Electronics Corporation., p2125vps20 Datasheet - Page 25

• Manufacturer Part Number: p2125vps20
• Description: 16-bit Single-chip Microcomputer H8s Family / H8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

Section 10 14-Bit PWM Timer (PWMX)
Figure 10.1 PWMX (D/A) Block Diagram................................................................................. 197
Figure 10.2 (1) DACNT Access Operation (1) [CPU → DACNT(H'AA57) Writing]............... 205
Figure 10.2 (2) DACNT Access Operation (2) [DACNT → CPU(H'AA57) Reading].............. 206
Figure 10.3 PWMX (D/A) Operation ......................................................................................... 207
Figure 10.4 Output Waveform (OS = 0, DADR corresponds to T
Figure 10.5 Output Waveform (OS = 1, DADR corresponds to T
Figure 10.6 D/A Data Register Configuration when CFS = 1 .................................................... 211
Figure 10.7 Output Waveform when DADR = H'0207 (OS = 1) ............................................... 212
Section 11 16-Bit Free-Running Timer (FRT)
Figure 11.1 Block Diagram of 16-Bit Free-Running Timer ....................................................... 216
Figure 11.2 Example of Pulse Output......................................................................................... 227
Figure 11.3 Increment Timing with Internal Clock Source ........................................................ 228
Figure 11.4 Increment Timing with External Clock Source ....................................................... 228
Figure 11.5 Timing of Output Compare A Output ..................................................................... 229
Figure 11.6 Clearing of FRC by Compare-Match A Signal ....................................................... 229
Figure 11.7 Input Capture Input Signal Timing (Usual Case) .................................................... 230
Figure 11.8 Input Capture Input Signal Timing (When ICRA to ICRD is Read)....................... 230
Figure 11.9 Buffered Input Capture Timing ............................................................................... 231
Figure 11.10 Buffered Input Capture Timing (BUFEA = 1) ...................................................... 232
Figure 11.11 Timing of Input Capture Flag (ICFA, ICFB, ICFC, or ICFD) Setting .................. 232
Figure 11.12 Timing of Output Compare Flag (OCFA or OCFB) Setting ................................. 233
Figure 11.13 Timing of Overflow Flag (OVF) Setting............................................................... 234
Figure 11.14 OCRA Automatic Addition Timing ...................................................................... 234
Figure 11.15 Timing of Input Capture Mask Signal Setting....................................................... 235
Figure 11.16 Timing of Input Capture Mask Signal Clearing .................................................... 235
Figure 11.17 Conflict between FRC Write and Clear................................................................. 237
Figure 11.18 Conflict between FRC Write and Increment ......................................................... 238
Figure 11.19 Conflict between OCR Write and Compare-Match
Figure 11.20 Conflict between OCR Write and Compare-Match
Section 12 16-Bit Cycle Measurement Timer (TCM)
Figure 12.1 Block Diagram of the TCM..................................................................................... 244
Figure 12.2 Example of Free Running Counter Operation ......................................................... 253
Figure 12.3 Count Timing of External Clock Operation (Falling Edges)................................... 253
Figure 12.4 Input Capture Operation Timing (Sensing of Rising Edges)................................... 254
Figure 12.5 Buffer Operation of Input Capture .......................................................................... 254
Figure 12.6 Timing of CMF Flag Setting on a Compare Match................................................. 255
(When Automatic Addition Function is Not Used) ............................................... 239
(When Automatic Addition Function is Used) ...................................................... 240
Rev. 1.00 Sep. 21, 2006 Page xxv of xxxviii
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