p2125vps20 Renesas Electronics Corporation., p2125vps20 Datasheet - Page 287
p2125vps20
Manufacturer Part Number
p2125vps20
Description
16-bit Single-chip Microcomputer H8s Family / H8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.P2125VPS20.pdf
(700 pages)
- Current page: 287 of 700
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Note:
12.3.6
TCMCR is an 8-bit readable/writable register. TCMCR selects input capture input edge, counter
start, and counter clock, and controls operation mode.
Bit
3
2 to 0
Bit
7
Bit Name
ICPF
*
Bit Name
CST
TCM Control Register (TCMCR)
Only 0 can be written to clear the flag.
Initial
Value
0
All 0
Initial
Value
0
R/W
R/(W)* Input Capture Generation
R/W
R/W
R/W
Description
Timer mode: The flag indicates that the value in TCMCNT
has been transferred to TCMICR on generation of an input
capture signal. This flag is set when the input capture signal
is generated, i.e. on detection of the edge selected by the
IEDGD bit on the TCMCYI input pin.
Speed measurement mode: The flag indicates that the value
in TCMCNT has been transferred to TCMICR on detection
of the third edge (rising or falling as determined by the IEDG
bit in TCMCR) during the measurement period.
Only 0 can be written to clear the flag.
[Setting condition]
Generation of the input capture signal
[Clearing condition]
Reading ICPF when ICPF = 1 and then writing 0 to ICPF
Reserved
The initial value should not be changed.
Description
Counter Start
In timer mode, setting this bit to 1 starts counting by
TCMCNT; clearing this bit stops counting by TCMCNT.
Then, the counter is initialized to H'0000, and input-capture
operation stops.
Clear this bit and thus return TCMCNT to H'0000 in
initialization for speed measurement mode.
Section 12 16-Bit Cycle Measurement Timer (TCM)
Rev. 1.00 Sep. 21, 2006 Page 249 of 658
REJ09B0310-0100
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