p2125vps20 Renesas Electronics Corporation., p2125vps20 Datasheet - Page 513

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p2125vps20

Manufacturer Part Number
p2125vps20
Description
16-bit Single-chip Microcomputer H8s Family / H8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Section 19 Flash Memory (0.18-µm F-ZTAT Version)
19.3.2
Programming/Erasing Interface Parameters
The programming/erasing interface parameters specify the operating frequency, storage place for
program data, programming destination address, and erase block and exchanges the processing
result for the downloaded on-chip program. These parameters use the CPU general registers (ER0
and ER1) or the on-chip RAM area. The initial value is undefined at a reset or in hardware standby
mode.
In download, initialization, or execution of the on-chip program, registers of the CPU except for
R0L are stored. The return value of the processing result is written in R0L. Since the stack area is
used for storing the registers except for R0L, the stack area must be saved at the processing start.
(A maximum size of a stack area to be used is 128 bytes.)
The programming/erasing interface parameters is used for the following four functions:
1. Download control
2. Initialization before programming or erasing
3. Programming
4. Erasing
These items use different parameters. The correspondence table is shown in table 19.4.
The meaning of bits in FPFR varies in each processing: initialization, programming, or erasure.
For details, see descriptions of FPFR for each processing.
Rev. 1.00 Sep. 21, 2006 Page 475 of 658
REJ09B0310-0100

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