p2125vps20 Renesas Electronics Corporation., p2125vps20 Datasheet - Page 362

• Manufacturer Part Number: p2125vps20
• Description: 16-bit Single-chip Microcomputer H8s Family / H8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

Section 15 Serial Communication Interface (SCI)
15.3.8
SCMR selects SCI functions and its format. SCMR can always be read from by the CPU. Writing
to SCMR by the CPU is enabled only in the initial setting, and not enabled during the receive,
transmit, or transfer operation.
Rev. 1.00 Sep. 21, 2006 Page 324 of 658
REJ09B0310-0100
Bit
7 to 4
3
2
1
0
Bit Name
—
—
SDIR
SINV
SMIF
Serial Interface Mode Register (SCMR)
Initial
Value
All 1
0
0
1
0
R/W
R
R/W
R/W
R
R/W
Description
Reserved
These bits are always read as 1 and cannot be modified.
Data Transfer Direction
Selects the serial/parallel conversion format.
0: TDR contents are transmitted with LSB-first.
1: TDR contents are transmitted with MSB-first.
The SDIR bit is valid only when the 8-bit data format is
used for transmission/reception; when the 7-bit data
format is used, data is always transmitted/received with
LSB-first.
Data Invert
Specifies inversion of the data logic level. The SINV bit
does not affect the logic level of the parity bit. When the
parity bit is inverted, invert the O/E bit in SMR.
0: TDR contents are transmitted as they are. Receive
1: TDR contents are inverted before being transmitted.
Reserved
This bit is always read as 1 and cannot be modified.
Serial Communication Interface Mode Select:
0: Normal asynchronous or clocked synchronous mode
1: Reserved mode
Receive data is stored as LSB first in RDR.
Receive data is stored as MSB first in RDR.
data is stored as it is in RDR.
Receive data is stored in inverted form in RDR.