p2125vps20 Renesas Electronics Corporation., p2125vps20 Datasheet - Page 518
p2125vps20
Manufacturer Part Number
p2125vps20
Description
16-bit Single-chip Microcomputer H8s Family / H8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.P2125VPS20.pdf
(700 pages)
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Section 19 Flash Memory (0.18-µm F-ZTAT Version)
For details on the programming procedure, see section 19.4.2, User Program Mode.
(a)
This parameter stores the start address of the programming destination on the user MAT.
When the address in an area other than the flash memory space is set, an error occurs.
The start address of the programming destination must be at the 128-byte boundary. If this
boundary condition is not satisfied, an error occurs. The error occurrence is indicated by the WA
bit (bit 1) in the FPFR parameter.
(b) Flash multipurpose data destination area parameter (FMPDR: general register ER0 of
This parameter stores the start address of the area which stores the data to be programmed in the
user MAT. When the storage destination of the program data is in flash memory, an error occurs.
The error occurrence is indicated by the WD bit in the FPFR parameter.
Rev. 1.00 Sep. 21, 2006 Page 480 of 658
REJ09B0310-0100
Bit
31 to 0 MOA31 to
Bit
31 to 0 MOD31 to
Flash multipurpose address area parameter (FMPAR: general register ER1 of CPU)
CPU)
Bit Name
Bit Name
MOA0
MOD0
Initial
Value
Initial
Value
R/W
R/W
R/W
R/W
Description
These bits store the start address of the programming
destination on the user MAT. Consecutive 128-byte
programming is executed starting from the specified start
address of the user MAT.
Therefore, the specified programming start address
becomes a 128-byte boundary and the MOA6 to MOA0
bits are always 0.
Description
These bits store the start address of the area which
stores the program data for the user MAT. Consecutive
128-byte data is programmed to the user MAT starting
from the specified start address.
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