p2125vps20 Renesas Electronics Corporation., p2125vps20 Datasheet - Page 584

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p2125vps20

Manufacturer Part Number
p2125vps20
Description
16-bit Single-chip Microcomputer H8s Family / H8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Section 19 Flash Memory (0.18-µm F-ZTAT Version)
19.9
1. The initial state of a Renesas product at shipment is the erased state. For a product whose
2. For the PROM programmer suitable for programmer mode in this LSI and its program version,
3. If the socket, socket adapter, or product index of the PROM programmer does not match the
4. If a voltage higher than the rated voltage is applied, the product may be fatally damaged. Use a
5. Do not remove the chip from the PROM programmer nor input a reset signal during
6. After programming/erasing, access to the flash memory is prohibited until FKEY is cleared. In
7. At turning on or off the VCC power supply, fix the RES pin to low and set the flash memory to
8. Perform programming to a 128-byte programming-unit block only once in on-board
9. When a chip is to be reprogrammed with the programmer after it has already been
10. To write data or programs to the flash memory, program data and programs must be allocated
Rev. 1.00 Sep. 21, 2006 Page 546 of 658
REJ09B0310-0100
history of erasing is undefined, automatic erasure for checking the initial state (erased state)
and compensating is recommended.
refer to the instruction manual of the socket adapter.
specifications, excessive current flows and the product may be damaged.
PROM programmer that supports a programming voltage of 3.3 V for Renesas
microcomputers with 512-Kbyte flash memory. Do not set the programmer to HN28F101 or a
programming voltage of 5.0 V. Use only the specified socket adapter. If other adapters are
used, the product may be damaged.
programming/erasing. As a high voltage is applied to the flash memory during
programming/erasing, doing so may damage flash memory permanently. If a reset is input
accidentally, the reset must be released after a reset period of 100 µs which is longer than
normal.
case the LSI mode is changed to generate a reset on completion of a programming/erasing
operation, a reset state (RES = 0) of 100 µs or more must be secured. Transitions to the reset
state or hardware standby mode are prohibited during programming/erasing operations.
However, when the reset signal is accidentally input to the chip, the reset must be released
after a reset period of 100 µs that is longer than normal.
the hardware protection state. This power-on or power-off timing must also be satisfied at a
power-off or power-on caused by a power failure and other factors.
programming or programmer mode.
Perform programming in the state where the programming-unit block is fully erased.
programmed or erased in on-board programming mode, automatic programming is
recommended to be performed after automatic erasure.
to addresses higher than that of the external interrupt vector table (in normal mode: H'0020, in
advanced mode: H'000040), and H'FF must be written to the areas that are reserved for the
system in the exception handling vector table.
Usage Notes

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