p2125vps20 Renesas Electronics Corporation., p2125vps20 Datasheet - Page 369

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p2125vps20

Manufacturer Part Number
p2125vps20
Description
16-bit Single-chip Microcomputer H8s Family / H8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
15.4
Figure 15.2 shows the general format for asynchronous serial communication. One frame consists
of a start bit (low level), followed by transmit/receive data, a parity bit, and finally stop bits (high
level). In asynchronous serial communication, the transmission line is usually held in the mark
state (high level). The SCI monitors the transmission line, and when it goes to the space state (low
level), recognizes a start bit and starts serial communication. Inside the SCI, the transmitter and
receiver are independent units, enabling full-duplex communication. Both the transmitter and the
receiver also have a double-buffered structure, so that data can be read or written during
transmission or reception, enabling continuous data transfer and reception.
Serial
data
Operation in Asynchronous Mode
1
Start
bit
1 bit
Figure 15.2 Data Format in Asynchronous Communication
0
LSB
D0
(Example with 8-Bit Data, Parity, Two Stop Bits)
One unit of transfer data (character or frame)
D1
D2
Transmit/receive data
D3
7 or 8 bits
D4
D5
Section 15 Serial Communication Interface (SCI)
D6
MSB
D7
Rev. 1.00 Sep. 21, 2006 Page 331 of 658
Parity
bit
1 bit or
none
0/1
Stop bit
1
1 or 2 bits
1
(mark state)
Idle state
REJ09B0310-0100
1

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