p2125vps20 Renesas Electronics Corporation., p2125vps20 Datasheet - Page 56

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p2125vps20

Manufacturer Part Number
p2125vps20
Description
16-bit Single-chip Microcomputer H8s Family / H8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Section 2 CPU
• High-speed operation
• Two CPU operating modes
• Power-down state
2.1.1
The differences between the H8S/2600 CPU and the H8S/2000 CPU are as shown below.
• Register configuration
• Basic instructions
• The number of execution states of the MULXU and MULXS instructions
In addition, there are differences in address space, CCR and EXR register functions, power-down
modes, etc., depending on the model.
Rev. 1.00 Sep. 21, 2006 Page 18 of 658
REJ09B0310-0100
Instruction
MULXU
MULXS
 All frequently-used instructions are executed in one or two states
 8/16/32-bit register-register add/subtract: 1 state
 8 × 8-bit register-register multiply: 12 states (MULXU.B), 13 states (MULXS.B)
 16 ÷ 8-bit register-register divide: 12 states (DIVXU.B)
 16 × 16-bit register-register multiply: 20 states (MULXU.W), 21 states (MULXS.W)
 32 ÷ 16-bit register-register divide: 20 states (DIVXU.W)
 Normal mode
 Advanced mode
 Transition to power-down state by SLEEP instruction
 Selectable CPU clock speed
The MAC register is supported only by the H8S/2600 CPU.
The four instructions MAC, CLRMAC, LDMAC, and STMAC are supported only by the
H8S/2600 CPU.
Differences between H8S/2600 CPU and H8S/2000 CPU
Mnemonic
MULXU.B Rs, Rd
MULXU.W Rs, ERd
MULXS.B Rs, Rd
MULXS.W Rs, ERd
H8S/2600
3
4
4
5
Execution States
H8S/2000
12
20
13
21

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