p2125vps20 Renesas Electronics Corporation., p2125vps20 Datasheet - Page 185

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p2125vps20

Manufacturer Part Number
p2125vps20
Description
16-bit Single-chip Microcomputer H8s Family / H8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
7.8
7.8.1
DTC operation can be enabled or disabled by the module stop control register (MSTPCR). In the
initial state, DTC operation is enabled. Access to DTC registers is disabled when module stop
mode is set. Note that when the DTC is being activated, module stop mode can not be specified.
For details, see section 22, Power-Down Modes.
7.8.2
MRA, MRB, SAR, DAR, CRA, and CRB are all located in on-chip RAM. When the DTC is used,
the RAME bit in SYSCR should not be cleared to 0.
7.8.3
For DTCE bit setting, use bit manipulation instructions such as BSET and BCLR, for reading and
writing. Multiple DTC activation sources can be set at one time (only at the initial setting) by
masking all interrupts and writing data after executing a dummy read on the relevant register.
7.8.4
Set the MSTP14 bit in MSTPCRH to 1 to make the DTC enter module stop mode, then confirm
that is set to 1 before making a transition to subactive mode or watch mode.
7.8.5
Interrupt sources of the SCI, IIC, or A/D converter are cleared when the DTC reads from or writes
to the specified registers, and they cannot be cleared when the DTC reads from or writes to
registers or memory that are not specified.
Usage Notes
Module Stop Mode Setting
On-Chip RAM
DTCE Bit Setting
Setting Required on Entering Subactive Mode or Watch Mode
DTC Activation by Interrupt Sources of SCI, IIC, or A/D Converter
Rev. 1.00 Sep. 21, 2006 Page 147 of 658
Section 7 Data Transfer Controller (DTC)
REJ09B0310-0100

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